panvk: Fix valhall_pack_buf_idx()

The descriptor lowering pass can add UBO loads to read descriptors, and
these loads already assume a nir_address_format_32bit_index_offset
format.

Bail out if we detect that case in valhall_pack_buf_idx().

Reported-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Fixes: 27beadcbdb ("panvk: Extend the shader logic to support Valhall")
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Rebecca Mckeever <rebecca.mckeever@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Reviewed-by: John Anthony <john.anthony@arm.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30969>

src/panfrost/vulkan/panvk_vX_shader.c

@@ -387,9 +387,15 @@ valhall_pack_buf_idx(nir_builder *b, nir_instr *instr, UNUSED void *data)
        intrin->intrinsic != nir_intrinsic_load_ssbo)
       return false;
 
-   b->cursor = nir_before_instr(&intrin->instr);
    nir_def *index = intrin->src[0].ssa;
 
+   /* The descriptor lowering pass can add UBO loads, and those already have the
+    * right index format. */
+   if (index->num_components == 1)
+      return false;
+
+   b->cursor = nir_before_instr(&intrin->instr);
+
    /* The valhall backend expects nir_address_format_32bit_index_offset,
     * but address mode is nir_address_format_vec2_index_32bit_offset to allow
     * us to store the array size, set and index without losing information