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i965/gen6 blorp depth: calculate base surface width/height

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(e3a49e1 for gen6)

This will be used in 3DSTATE_DEPTH_BUFFER in a later patch.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
Jordan Justen
2013-07-09 15:32:42 -07:00
parent 039eb81abf
commit 96306a6cbb
1 changed files with 13 additions and 0 deletions
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src/mesa/drivers/dri/i965/gen6_blorp.cpp
+13
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@@ -780,6 +780,7 @@ gen6_blorp_emit_depth_stencil_config(struct brw_context *brw,
uint32_t draw_x = params->depth.x_offset;
uint32_t draw_y = params->depth.y_offset;
uint32_t tile_mask_x, tile_mask_y;
uint32_t surfwidth, surfheight;
uint32_t surftype;
unsigned int depth = MAX2(params->depth.mt->logical_depth0, 1);
GLenum gl_target = params->depth.mt->target;
@@ -811,6 +812,18 @@ gen6_blorp_emit_depth_stencil_config(struct brw_context *brw,
lod = params->depth.level - params->depth.mt->first_level;
if (params->hiz_op != GEN6_HIZ_OP_NONE && lod == 0) {
/* HIZ ops for lod 0 may set the width & height a little
* larger to allow the fast depth clear to fit the hardware
* alignment requirements. (8x4)
*/
surfwidth = params->depth.width;
surfheight = params->depth.height;
} else {
surfwidth = params->depth.mt->logical_width0;
surfheight = params->depth.mt->logical_height0;
}
/* 3DSTATE_DEPTH_BUFFER */
{
uint32_t tile_x = draw_x & tile_mask_x;