nir: remove nir_shader_compiler_options::lower_all_io_to_temps

All drivers should report support_indirect_* correctly, so this is redundant. Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35945>
2025-07-04 13:13:12 -04:00
parent 8def3f865d
commit 89285e25b6
12 changed files with 4 additions and 25 deletions
@@ -2769,14 +2769,8 @@ ntq_emit_load_input(struct v3d_compile *c, nir_intrinsic_instr *instr)
 {
        /* XXX: Use ldvpmv (uniform offset) or ldvpmd (non-uniform offset).
         *
-         * Right now the driver sets support_indirect_inputs even
-         * if we don't support non-uniform offsets because we also set the
-         * lower_all_io_to_temps option in the NIR compiler. This ensures that
-         * any indirect indexing on in/out variables is turned into indirect
-         * indexing on temporary variables instead, that we handle by lowering
-         * to scratch. If we implement non-uniform offset here we might be able
-         * to avoid the temp and scratch lowering, which involves copying from
-         * the input to the temp variable, possibly making code more optimal.
+         * Indirect indexing is lowered by the GLSL compiler based on
+         * support_indirect_inputs.
         */
        unsigned offset =
                nir_intrinsic_base(instr) + nir_src_as_uint(instr->src[0]);
@@ -162,7 +162,6 @@ v3dv_pipeline_get_nir_options(const struct v3d_device_info *devinfo)
      .lower_uadd_sat = true,
      .lower_usub_sat = true,
      .lower_iadd_sat = true,
-      .lower_all_io_to_temps = true,
      .lower_extract_byte = true,
      .lower_extract_word = true,
      .lower_insert_byte = true,
@@ -1328,7 +1328,6 @@ preprocess_shader(const struct gl_constants *consts,

   NIR_PASS(_, nir, nir_lower_io_vars_to_temporaries,
            nir_shader_get_entrypoint(nir), true,
-            options->lower_all_io_to_temps ||
            nir->info.stage == MESA_SHADER_VERTEX ||
            nir->info.stage == MESA_SHADER_GEOMETRY);

@@ -355,9 +355,6 @@ typedef struct nir_shader_compiler_options {
   bool lower_insert_byte;
   bool lower_insert_word;

-   /* TODO: this flag is potentially useless, remove? */
-   bool lower_all_io_to_temps;
-
   /* Indicates that the driver only has zero-based vertex id */
   bool vertex_id_zero_based;

@@ -13,8 +13,7 @@
 * We need to set the (ei) "end input" flag on the last varying fetch.
 * And we want to ensure that all threads execute the instruction that
 * sets (ei).  The easiest way to ensure this is to move all varying
- * fetches into the start block.  Which is something we used to get for
- * free by using lower_all_io_to_temps=true.
+ * fetches into the start block.
 *
 * This may come at the cost of additional register usage.  OTOH setting
 * the (ei) flag earlier probably frees up more VS to run.
@@ -50,7 +50,6 @@ etna_compiler_create(const char *renderer, const struct etna_core_info *info)
      .lower_ldexp = true,
      .lower_mul_high = true,
      .lower_bitops = true,
-      .lower_all_io_to_temps = true,
      .lower_flrp32 = true,
      .lower_fmod = true,
      .lower_vector_cmp = true,
@@ -23,7 +23,6 @@ static const nir_shader_compiler_options options = {
   .fuse_ffma32 = true,
   .fuse_ffma64 = true,
   /* .fdot_replicates = true, it is replicated, but it makes things worse */
-   .lower_all_io_to_temps = true,
   .vertex_id_zero_based = true, /* its not implemented anyway */
   .lower_bitops = true,
   .lower_vector_cmp = true,
@@ -113,8 +113,6 @@ load_glsl(unsigned num_files, char *const *files, gl_shader_stage stage)
      .lower_precision = true,
   };
   struct gl_shader_program *prog;
-   const nir_shader_compiler_options *nir_options =
-      ir3_get_compiler_options(compiler);
   static struct gl_context local_ctx;

   prog = standalone_compile_shader(&options, num_files, files, &local_ctx);
@@ -124,8 +122,7 @@ load_glsl(unsigned num_files, char *const *files, gl_shader_stage stage)
   nir_shader *nir = prog->_LinkedShaders[stage]->Program->nir;

   /* required NIR passes: */
-   if (nir_options->lower_all_io_to_temps ||
-       nir->info.stage == MESA_SHADER_VERTEX ||
+   if (nir->info.stage == MESA_SHADER_VERTEX ||
       nir->info.stage == MESA_SHADER_GEOMETRY) {
      NIR_PASS_V(nir, nir_lower_io_vars_to_temporaries,
                 nir_shader_get_entrypoint(nir), true, true);
@@ -3614,7 +3614,6 @@ nvir_nir_shader_compiler_options(int chipset, uint8_t shader_type)
   op.lower_extract_word = (chipset < NVISA_GM107_CHIPSET);
   op.lower_insert_byte = true;
   op.lower_insert_word = true;
-   op.lower_all_io_to_temps = false;
   op.vertex_id_zero_based = false;
   op.lower_base_vertex = false;
   op.lower_helper_invocation = false;
@@ -1219,7 +1219,6 @@ bool r600_common_screen_init(struct r600_common_screen *rscreen,
 	}

        rscreen->nir_options_fs = rscreen->nir_options;
-	rscreen->nir_options_fs.lower_all_io_to_temps = true;
 	rscreen->nir_options.support_indirect_inputs = BITFIELD_BIT(PIPE_SHADER_TESS_CTRL);
 	rscreen->nir_options.support_indirect_outputs = BITFIELD_BIT(PIPE_SHADER_TESS_CTRL);

@@ -546,7 +546,6 @@ v3d_screen_get_compiler_options(struct pipe_screen *pscreen,
                .lower_uadd_sat = true,
                .lower_usub_sat = true,
                .lower_iadd_sat = true,
-                .lower_all_io_to_temps = true,
                .lower_extract_byte = true,
                .lower_extract_word = true,
                .lower_insert_byte = true,
@@ -2156,7 +2156,6 @@ nir_to_qir(struct vc4_compile *c)
 }

 static const nir_shader_compiler_options nir_options = {
-        .lower_all_io_to_temps = true,
        .lower_extract_byte = true,
        .lower_extract_word = true,
        .lower_insert_byte = true,