AlexIndustrial/mesa
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

radeonsi/gfx7: always sync pfp/me

Browse Source 
Workaround for https://gitlab.freedesktop.org/mesa/mesa/-/issues/4764

Fixes: c5326164 ("radeonsi: add SI_CONTEXT_PFP_SYNC_ME to skip syncing PFP for image operations")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11625>
This commit is contained in:
Pierre-Eric Pelloux-Prayer
2021-06-28 14:52:07 +02:00
parent b72c7c6c56
commit 822f377736
1 changed files with 3 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/gallium/drivers/radeonsi/si_gfx_cs.c
+3 -1
View File
@@ -640,7 +640,9 @@ void si_emit_surface_sync(struct si_context *sctx, struct radeon_cmdbuf *cs, uns
assert(sctx->chip_class <= GFX9);
cp_coher_cntl |= 1u << 31; /* don't sync PFP, i.e. execute the sync in ME */
/* This seems problematic with GFX7 (see #4764) */
if (sctx->chip_class != GFX7)
cp_coher_cntl |= 1u << 31; /* don't sync PFP, i.e. execute the sync in ME */
radeon_begin(cs);