From 822f37773687a4753a2dff8eba1173d57eb0ce18 Mon Sep 17 00:00:00 2001 From: Pierre-Eric Pelloux-Prayer Date: Mon, 28 Jun 2021 14:52:07 +0200 Subject: [PATCH] radeonsi/gfx7: always sync pfp/me MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Workaround for https://gitlab.freedesktop.org/mesa/mesa/-/issues/4764 Fixes: c5326164 ("radeonsi: add SI_CONTEXT_PFP_SYNC_ME to skip syncing PFP for image operations") Reviewed-by: Marek Olšák Part-of: --- src/gallium/drivers/radeonsi/si_gfx_cs.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/radeonsi/si_gfx_cs.c b/src/gallium/drivers/radeonsi/si_gfx_cs.c index 6cb7c93730e..8ecd92f247c 100644 --- a/src/gallium/drivers/radeonsi/si_gfx_cs.c +++ b/src/gallium/drivers/radeonsi/si_gfx_cs.c @@ -640,7 +640,9 @@ void si_emit_surface_sync(struct si_context *sctx, struct radeon_cmdbuf *cs, uns assert(sctx->chip_class <= GFX9); - cp_coher_cntl |= 1u << 31; /* don't sync PFP, i.e. execute the sync in ME */ + /* This seems problematic with GFX7 (see #4764) */ + if (sctx->chip_class != GFX7) + cp_coher_cntl |= 1u << 31; /* don't sync PFP, i.e. execute the sync in ME */ radeon_begin(cs);