tu: Fix case where vertex input is set but not vertex buffers

Some CTS tests, in particular,
dEQP-VK.pipeline.pipeline_library.graphics_library.misc.independent_pipeline_layout_sets.*,
do the following:

1. Create a pipeline with a vertex input struct that defines a single
   attribute pointing to vertex buffer #0, but a vertex shader that
   doesn't use any attributes.
2. Bind the pipeline, but don't call vkCmdBindVertexBuffers(), then
   draw.

Other drivers handle this just fine because the vertex input registers
are never used. However we have an optimization in turnip where we
pre-calculate the size of the vertex buffer draw state when the vertex
input draw state is bound, which results in a vertex buffer draw state
with non-zero size but zero iova, resulting in hangs. While it's
questionable whether this is allowed, it's easy enough to just disable
the draw state in that case.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18554>

src/freedreno/vulkan/tu_cmd_buffer.c

@@ -561,10 +561,8 @@ tu_cs_emit_draw_state(struct tu_cs *cs, uint32_t id, struct tu_draw_state state)
    tu_cs_emit(cs, CP_SET_DRAW_STATE__0_COUNT(state.size) |
                   enable_mask |
                   CP_SET_DRAW_STATE__0_GROUP_ID(id) |
-                  COND(!state.size, CP_SET_DRAW_STATE__0_DISABLE));
+                  COND(!state.size || !state.iova, CP_SET_DRAW_STATE__0_DISABLE));
    tu_cs_emit_qw(cs, state.iova);
-
-   assert(!state.size || state.iova);
 }
 
 static bool