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radv: add a function to get compute pipeline metadata for DGC

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This struct will be used to emit a compute pipeline from the prepare
DGC shader.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27495>
This commit is contained in:
Samuel Pitoiset
2024-02-06 18:20:14 +01:00
committed by Marge Bot
parent 7409d7ec29
commit 6d8f88d12f
2 changed files with 56 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/amd/vulkan/radv_pipeline_compute.c
+38
View File
@@ -72,6 +72,44 @@ radv_get_compute_resource_limits(const struct radv_physical_device *pdevice, con
threadgroups_per_cu);
}
void
radv_get_compute_pipeline_metadata(const struct radv_device *device, const struct radv_compute_pipeline *pipeline,
struct radv_compute_pipeline_metadata *metadata)
{
const struct radv_shader *cs = pipeline->base.shaders[MESA_SHADER_COMPUTE];
uint32_t upload_sgpr = 0, inline_sgpr = 0;
memset(metadata, 0, sizeof(*metadata));
metadata->shader_va = radv_shader_get_va(cs) >> 8;
metadata->rsrc1 = cs->config.rsrc1;
metadata->rsrc2 = cs->config.rsrc2;
metadata->rsrc3 = cs->config.rsrc3;
metadata->compute_resource_limits = radv_get_compute_resource_limits(device->physical_device, cs);
metadata->block_size_x = cs->info.cs.block_size[0];
metadata->block_size_y = cs->info.cs.block_size[1];
metadata->block_size_z = cs->info.cs.block_size[2];
metadata->wave32 = cs->info.wave_size == 32;
const struct radv_userdata_info *grid_size_loc = radv_get_user_sgpr(cs, AC_UD_CS_GRID_SIZE);
if (grid_size_loc->sgpr_idx != -1) {
metadata->grid_base_sgpr = (cs->info.user_data_0 + 4 * grid_size_loc->sgpr_idx - SI_SH_REG_OFFSET) >> 2;
}
const struct radv_userdata_info *push_constant_loc = radv_get_user_sgpr(cs, AC_UD_PUSH_CONSTANTS);
if (push_constant_loc->sgpr_idx != -1) {
upload_sgpr = (cs->info.user_data_0 + 4 * push_constant_loc->sgpr_idx - SI_SH_REG_OFFSET) >> 2;
}
const struct radv_userdata_info *inline_push_constant_loc = radv_get_user_sgpr(cs, AC_UD_INLINE_PUSH_CONSTANTS);
if (inline_push_constant_loc->sgpr_idx != -1) {
inline_sgpr = (cs->info.user_data_0 + 4 * inline_push_constant_loc->sgpr_idx - SI_SH_REG_OFFSET) >> 2;
}
metadata->push_const_sgpr = upload_sgpr | (inline_sgpr << 16);
metadata->inline_push_const_mask = cs->info.inline_push_constant_mask;
}
void
radv_emit_compute_shader(const struct radv_physical_device *pdevice, struct radeon_cmdbuf *cs,
const struct radv_shader *shader)
src/amd/vulkan/radv_private.h
+18
View File
@@ -3771,6 +3771,24 @@ radv_uses_image_float32_atomics(const struct radv_device *device)
bool radv_device_fault_detection_enabled(const struct radv_device *device);
struct radv_compute_pipeline_metadata {
uint32_t shader_va;
uint32_t rsrc1;
uint32_t rsrc2;
uint32_t rsrc3;
uint32_t compute_resource_limits;
uint32_t block_size_x;
uint32_t block_size_y;
uint32_t block_size_z;
uint32_t wave32;
uint32_t grid_base_sgpr;
uint32_t push_const_sgpr;
uint64_t inline_push_const_mask;
};
void radv_get_compute_pipeline_metadata(const struct radv_device *device, const struct radv_compute_pipeline *pipeline,
struct radv_compute_pipeline_metadata *metadata);
#define RADV_FROM_HANDLE(__radv_type, __name, __handle) VK_FROM_HANDLE(__radv_type, __name, __handle)
VK_DEFINE_HANDLE_CASTS(radv_cmd_buffer, vk.base, VkCommandBuffer, VK_OBJECT_TYPE_COMMAND_BUFFER)