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radeonsi/vcn: Use correct frame context buffer for preencode on VCN5

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Fixes: 3c5fe03b92 ("radeonsi/vcn: Add support for VCN5 dpb tier2")
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31985>
This commit is contained in:
David Rosca
2024-11-05 15:59:57 +01:00
committed by Marge Bot
parent c0edb9344f
commit 4ec43c59da
1 changed files with 1 additions and 1 deletions
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2
src/gallium/drivers/radeonsi/radeon_vcn_enc_5_0.c
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@@ -341,7 +341,7 @@ static void radeon_enc_ctx_tier2(struct radeon_encoder *enc)
continue;
}
struct rvid_buffer *pre = enc->enc_pic.dpb_bufs[i]->pre;
struct rvid_buffer *pre_fcb = enc->enc_pic.dpb_bufs[i]->fcb;
struct rvid_buffer *pre_fcb = enc->enc_pic.dpb_bufs[i]->pre_fcb;
RADEON_ENC_READWRITE(pre->res->buf, pre->res->domains, 0);
RADEON_ENC_CS(enc->enc_pic.ctx_buf.rec_luma_pitch);
RADEON_ENC_READWRITE(pre->res->buf, pre->res->domains, enc->enc_pic.dpb_luma_size);