AlexIndustrial/mesa
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

amd/vpelib: Add missing swizzle and dcc info

Browse Source 
Add missing swizzle mode and dcc info

Reviewed-by: Ricky Lin <Ricky.Lin@amd.com>
Reviewed-by: Jude Shih <Jude.Shih@amd.com>
Acked-by: Chuanyu Tseng <Chuanyu.Tseng@amd.com>
Signed-off-by: Tomson Chang <tomson.chang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36433>
This commit is contained in:
Chang, Tomson
2025-06-05 12:27:30 +08:00
committed by Marge Bot
parent d281a5587d
commit 48495c142a
2 changed files with 19 additions and 13 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/amd/vpelib/inc/vpe_hw_types.h
+12 -6
View File
@@ -193,13 +193,19 @@ struct vpe_plane_size {
struct vpe_plane_dcc_param {
bool enable; /**< Enable DCC */
uint32_t meta_pitch; /**< DCC meta surface pitch in bytes */
bool independent_64b_blks; /**< DCC independent 64 byte blocks */
uint8_t dcc_ind_blk; /**< DCC independent block size */
union {
/** @brief DCC params for source, required for display DCC only */
struct {
uint32_t meta_pitch; /**< DCC meta surface pitch in bytes */
bool independent_64b_blks; /**< DCC independent 64 byte blocks */
uint8_t dcc_ind_blk; /**< DCC independent block size */
uint32_t meta_pitch_c; /**< DCC meta surface pitch for chroma plane in bytes */
bool independent_64b_blks_c; /**< DCC independent 64 byte blocks for chroma plane */
uint8_t dcc_ind_blk_c; /**< DCC independent block size for chroma plane */
uint32_t meta_pitch_c; /**< DCC meta surface pitch for chroma plane in bytes */
bool independent_64b_blks_c; /**< DCC independent 64 byte blocks for chroma plane */
uint8_t dcc_ind_blk_c; /**< DCC independent block size for chroma plane */
} src;
};
};
/** @enum vpe_surface_pixel_format
src/gallium/drivers/radeonsi/si_vpe.c
+7 -7
View File
@@ -595,13 +595,13 @@ si_vpe_set_surface_info(struct vpe_video_processor *vpeproc,
return VPE_STATUS_NOT_SUPPORTED;
struct vpe_plane_dcc_param *dcc_param = &surface_info->dcc;
dcc_param->enable = false;
dcc_param->meta_pitch = 0;
dcc_param->independent_64b_blks = false;
dcc_param->dcc_ind_blk = 0;
dcc_param->meta_pitch_c = 0;
dcc_param->independent_64b_blks_c = false;
dcc_param->dcc_ind_blk_c = 0;
dcc_param->enable = false;
dcc_param->src.meta_pitch = 0;
dcc_param->src.independent_64b_blks = false;
dcc_param->src.dcc_ind_blk = 0;
dcc_param->src.meta_pitch_c = 0;
dcc_param->src.independent_64b_blks_c = false;
dcc_param->src.dcc_ind_blk_c = 0;
return VPE_STATUS_OK;
}