diff --git a/src/amd/vpelib/inc/vpe_hw_types.h b/src/amd/vpelib/inc/vpe_hw_types.h
index 41e6621608a..86fa9f68952 100644
--- a/src/amd/vpelib/inc/vpe_hw_types.h
+++ b/src/amd/vpelib/inc/vpe_hw_types.h
@@ -193,13 +193,19 @@ struct vpe_plane_size {
 struct vpe_plane_dcc_param {
     bool enable;                     /**< Enable DCC */
 
-    uint32_t meta_pitch;             /**< DCC meta surface pitch in bytes */
-    bool     independent_64b_blks;   /**< DCC independent 64 byte blocks */
-    uint8_t  dcc_ind_blk;            /**< DCC independent block size */
+    union {
+        /** @brief DCC params for source, required for display DCC only */
+        struct {
+            uint32_t meta_pitch;           /**< DCC meta surface pitch in bytes */
+            bool     independent_64b_blks; /**< DCC independent 64 byte blocks */
+            uint8_t  dcc_ind_blk;          /**< DCC independent block size */
 
-    uint32_t meta_pitch_c;           /**< DCC meta surface pitch for chroma plane in bytes */
-    bool     independent_64b_blks_c; /**< DCC independent 64 byte blocks for chroma plane */
-    uint8_t  dcc_ind_blk_c;          /**< DCC independent block size for chroma plane */
+            uint32_t meta_pitch_c;         /**< DCC meta surface pitch for chroma plane in bytes */
+            bool     independent_64b_blks_c; /**< DCC independent 64 byte blocks for chroma plane */
+            uint8_t  dcc_ind_blk_c;          /**< DCC independent block size for chroma plane */
+        } src;
+
+    };
 };
 
 /** @enum vpe_surface_pixel_format
diff --git a/src/gallium/drivers/radeonsi/si_vpe.c b/src/gallium/drivers/radeonsi/si_vpe.c
index 04aa11c789c..6639d0b504a 100644
--- a/src/gallium/drivers/radeonsi/si_vpe.c
+++ b/src/gallium/drivers/radeonsi/si_vpe.c
@@ -595,13 +595,13 @@ si_vpe_set_surface_info(struct vpe_video_processor *vpeproc,
       return VPE_STATUS_NOT_SUPPORTED;
 
    struct vpe_plane_dcc_param *dcc_param = &surface_info->dcc;
-   dcc_param->enable                   = false;
-   dcc_param->meta_pitch               = 0;
-   dcc_param->independent_64b_blks     = false;
-   dcc_param->dcc_ind_blk              = 0;
-   dcc_param->meta_pitch_c             = 0;
-   dcc_param->independent_64b_blks_c   = false;
-   dcc_param->dcc_ind_blk_c            = 0;
+   dcc_param->enable                     = false;
+   dcc_param->src.meta_pitch             = 0;
+   dcc_param->src.independent_64b_blks   = false;
+   dcc_param->src.dcc_ind_blk            = 0;
+   dcc_param->src.meta_pitch_c           = 0;
+   dcc_param->src.independent_64b_blks_c = false;
+   dcc_param->src.dcc_ind_blk_c          = 0;
 
    return VPE_STATUS_OK;
 }