freedreno/ir3: vec8+vec16 support

Signed-off-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13300>
2021-08-08 12:45:58 -07:00
parent f5bbf77be8
commit 3bd265a393
1 changed files with 2 additions and 1 deletions
@@ -311,7 +311,8 @@ emit_alu(struct ir3_context *ctx, nir_alu_instr *alu)
    * order into each writemask channel.
    */
   if ((alu->op == nir_op_vec2) || (alu->op == nir_op_vec3) ||
-       (alu->op == nir_op_vec4)) {
+       (alu->op == nir_op_vec4) || (alu->op == nir_op_vec8) ||
+       (alu->op == nir_op_vec16)) {

      for (int i = 0; i < info->num_inputs; i++) {
         nir_alu_src *asrc = &alu->src[i];