Merge commit 'origin/master' into gallium-0.2
This commit is contained in:
@@ -1306,14 +1306,13 @@ static void build_lighting( struct tnl_program *p )
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}
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else if (!p->state->material_shininess_is_zero) {
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emit_op1(p, OPCODE_LIT, lit, 0, dots);
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emit_op2(p, OPCODE_ADD, _col0, 0, ambient, _col0);
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emit_op2(p, OPCODE_ADD, _bfc0, 0, ambient, _bfc0);
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}
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else {
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emit_degenerate_lit(p, lit, dots);
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emit_op2(p, OPCODE_ADD, _col0, 0, ambient, _col0);
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emit_op2(p, OPCODE_ADD, _bfc0, 0, ambient, _bfc0);
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}
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emit_op2(p, OPCODE_ADD, _bfc0, 0, ambient, _bfc0);
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emit_op3(p, OPCODE_MAD, res0, mask0, swizzle1(lit,Y), diffuse, _bfc0);
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emit_op3(p, OPCODE_MAD, res1, mask1, swizzle1(lit,Z), specular, _bfc1);
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+260
-25
@@ -219,6 +219,37 @@ fetch_vector4(const struct prog_src_register *source,
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}
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/**
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* Fetch a 4-element uint vector from the given source register.
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* Apply swizzling but not negation/abs.
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*/
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static void
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fetch_vector4ui(const struct prog_src_register *source,
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const struct gl_program_machine *machine, GLuint result[4])
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{
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const GLuint *src = (GLuint *) get_register_pointer(source, machine);
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ASSERT(src);
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if (source->Swizzle == SWIZZLE_NOOP) {
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/* no swizzling */
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COPY_4V(result, src);
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}
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else {
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ASSERT(GET_SWZ(source->Swizzle, 0) <= 3);
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ASSERT(GET_SWZ(source->Swizzle, 1) <= 3);
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ASSERT(GET_SWZ(source->Swizzle, 2) <= 3);
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ASSERT(GET_SWZ(source->Swizzle, 3) <= 3);
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result[0] = src[GET_SWZ(source->Swizzle, 0)];
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result[1] = src[GET_SWZ(source->Swizzle, 1)];
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result[2] = src[GET_SWZ(source->Swizzle, 2)];
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result[3] = src[GET_SWZ(source->Swizzle, 3)];
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}
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/* Note: no NegateBase, Abs, NegateAbs here */
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}
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/**
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* Fetch the derivative with respect to X or Y for the given register.
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* XXX this currently only works for fragment program input attribs.
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@@ -229,7 +260,8 @@ fetch_vector4_deriv(GLcontext * ctx,
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const struct gl_program_machine *machine,
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char xOrY, GLfloat result[4])
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{
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if (source->File == PROGRAM_INPUT && source->Index < (GLint)machine->NumDeriv) {
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if (source->File == PROGRAM_INPUT &&
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source->Index < (GLint) machine->NumDeriv) {
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const GLint col = machine->CurElement;
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const GLfloat w = machine->Attribs[FRAG_ATTRIB_WPOS][col][3];
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const GLfloat invQ = 1.0f / w;
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@@ -493,6 +525,89 @@ store_vector4(const struct prog_instruction *inst,
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}
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/**
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* Store 4 uints into a register. Observe the set-condition-code flags.
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*/
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static void
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store_vector4ui(const struct prog_instruction *inst,
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struct gl_program_machine *machine, const GLuint value[4])
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{
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const struct prog_dst_register *dest = &(inst->DstReg);
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GLuint *dstReg;
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GLuint dummyReg[4];
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GLuint writeMask = dest->WriteMask;
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switch (dest->File) {
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case PROGRAM_OUTPUT:
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ASSERT(dest->Index < MAX_PROGRAM_OUTPUTS);
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dstReg = (GLuint *) machine->Outputs[dest->Index];
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break;
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case PROGRAM_TEMPORARY:
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ASSERT(dest->Index < MAX_PROGRAM_TEMPS);
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dstReg = (GLuint *) machine->Temporaries[dest->Index];
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break;
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case PROGRAM_WRITE_ONLY:
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dstReg = dummyReg;
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return;
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default:
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_mesa_problem(NULL, "bad register file in store_vector4(fp)");
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return;
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}
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if (dest->CondMask != COND_TR) {
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/* condition codes may turn off some writes */
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if (writeMask & WRITEMASK_X) {
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if (!test_cc(machine->CondCodes[GET_SWZ(dest->CondSwizzle, 0)],
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dest->CondMask))
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writeMask &= ~WRITEMASK_X;
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}
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if (writeMask & WRITEMASK_Y) {
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if (!test_cc(machine->CondCodes[GET_SWZ(dest->CondSwizzle, 1)],
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dest->CondMask))
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writeMask &= ~WRITEMASK_Y;
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}
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if (writeMask & WRITEMASK_Z) {
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if (!test_cc(machine->CondCodes[GET_SWZ(dest->CondSwizzle, 2)],
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dest->CondMask))
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writeMask &= ~WRITEMASK_Z;
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}
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if (writeMask & WRITEMASK_W) {
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if (!test_cc(machine->CondCodes[GET_SWZ(dest->CondSwizzle, 3)],
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dest->CondMask))
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writeMask &= ~WRITEMASK_W;
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}
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}
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if (writeMask & WRITEMASK_X)
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dstReg[0] = value[0];
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if (writeMask & WRITEMASK_Y)
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dstReg[1] = value[1];
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if (writeMask & WRITEMASK_Z)
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dstReg[2] = value[2];
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if (writeMask & WRITEMASK_W)
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dstReg[3] = value[3];
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if (inst->CondUpdate) {
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if (writeMask & WRITEMASK_X)
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machine->CondCodes[0] = generate_cc(value[0]);
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if (writeMask & WRITEMASK_Y)
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machine->CondCodes[1] = generate_cc(value[1]);
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if (writeMask & WRITEMASK_Z)
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machine->CondCodes[2] = generate_cc(value[2]);
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if (writeMask & WRITEMASK_W)
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machine->CondCodes[3] = generate_cc(value[3]);
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#if DEBUG_PROG
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printf("CondCodes=(%s,%s,%s,%s) for:\n",
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_mesa_condcode_string(machine->CondCodes[0]),
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_mesa_condcode_string(machine->CondCodes[1]),
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_mesa_condcode_string(machine->CondCodes[2]),
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_mesa_condcode_string(machine->CondCodes[3]));
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#endif
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}
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}
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/**
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* Execute the given vertex/fragment program.
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*
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@@ -572,6 +687,18 @@ _mesa_execute_program(GLcontext * ctx,
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}
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}
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break;
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case OPCODE_AND: /* bitwise AND */
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{
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GLuint a[4], b[4], result[4];
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fetch_vector4ui(&inst->SrcReg[0], machine, a);
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fetch_vector4ui(&inst->SrcReg[1], machine, b);
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result[0] = a[0] & b[0];
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result[1] = a[1] & b[1];
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result[2] = a[2] & b[2];
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result[3] = a[3] & b[3];
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store_vector4ui(inst, machine, result);
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}
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break;
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case OPCODE_ARL:
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{
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GLfloat t[4];
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@@ -650,6 +777,33 @@ _mesa_execute_program(GLcontext * ctx,
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store_vector4(inst, machine, result);
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}
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break;
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case OPCODE_DP2:
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{
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GLfloat a[4], b[4], result[4];
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fetch_vector4(&inst->SrcReg[0], machine, a);
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fetch_vector4(&inst->SrcReg[1], machine, b);
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result[0] = result[1] = result[2] = result[3] = DOT2(a, b);
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store_vector4(inst, machine, result);
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if (DEBUG_PROG) {
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printf("DP2 %g = (%g %g) . (%g %g)\n",
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result[0], a[0], a[1], b[0], b[1]);
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}
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}
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break;
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case OPCODE_DP2A:
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{
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GLfloat a[4], b[4], c, result[4];
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fetch_vector4(&inst->SrcReg[0], machine, a);
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fetch_vector4(&inst->SrcReg[1], machine, b);
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fetch_vector1(&inst->SrcReg[1], machine, &c);
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result[0] = result[1] = result[2] = result[3] = DOT2(a, b) + c;
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store_vector4(inst, machine, result);
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if (DEBUG_PROG) {
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printf("DP2A %g = (%g %g) . (%g %g) + %g\n",
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result[0], a[0], a[1], b[0], b[1], c);
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}
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}
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break;
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case OPCODE_DP3:
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{
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GLfloat a[4], b[4], result[4];
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@@ -682,8 +836,7 @@ _mesa_execute_program(GLcontext * ctx,
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GLfloat a[4], b[4], result[4];
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fetch_vector4(&inst->SrcReg[0], machine, a);
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fetch_vector4(&inst->SrcReg[1], machine, b);
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result[0] = result[1] = result[2] = result[3] =
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a[0] * b[0] + a[1] * b[1] + a[2] * b[2] + b[3];
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result[0] = result[1] = result[2] = result[3] = DOT3(a, b) + b[3];
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store_vector4(inst, machine, result);
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}
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break;
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@@ -1020,39 +1173,94 @@ _mesa_execute_program(GLcontext * ctx,
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break;
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case OPCODE_NOP:
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break;
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case OPCODE_PK2H: /* pack two 16-bit floats in one 32-bit float */
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case OPCODE_NOT: /* bitwise NOT */
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{
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GLuint a[4], result[4];
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fetch_vector4ui(&inst->SrcReg[0], machine, a);
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result[0] = ~a[0];
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result[1] = ~a[1];
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result[2] = ~a[2];
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result[3] = ~a[3];
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store_vector4ui(inst, machine, result);
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}
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break;
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case OPCODE_NRM3: /* 3-component normalization */
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{
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GLfloat a[4], result[4];
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GLfloat tmp;
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fetch_vector4(&inst->SrcReg[0], machine, a);
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tmp = a[0] * a[0] + a[1] * a[1] + a[2] * a[2];
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if (tmp != 0.0F)
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tmp = 1.0F / tmp;
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result[0] = tmp * a[0];
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result[1] = tmp * a[1];
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result[2] = tmp * a[2];
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result[3] = 0.0; /* undefined, but prevent valgrind warnings */
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store_vector4(inst, machine, result);
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}
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break;
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case OPCODE_NRM4: /* 4-component normalization */
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{
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GLfloat a[4], result[4];
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GLfloat tmp;
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fetch_vector4(&inst->SrcReg[0], machine, a);
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tmp = a[0] * a[0] + a[1] * a[1] + a[2] * a[2] + a[3] * a[3];
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if (tmp != 0.0F)
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tmp = 1.0F / tmp;
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result[0] = tmp * a[0];
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result[1] = tmp * a[1];
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result[2] = tmp * a[2];
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result[3] = tmp * a[3];
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store_vector4(inst, machine, result);
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}
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break;
|
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case OPCODE_OR: /* bitwise OR */
|
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{
|
||||
GLuint a[4], b[4], result[4];
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fetch_vector4ui(&inst->SrcReg[0], machine, a);
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fetch_vector4ui(&inst->SrcReg[1], machine, b);
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result[0] = a[0] | b[0];
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result[1] = a[1] | b[1];
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result[2] = a[2] | b[2];
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result[3] = a[3] | b[3];
|
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store_vector4ui(inst, machine, result);
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}
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break;
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case OPCODE_PK2H: /* pack two 16-bit floats in one 32-bit float */
|
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{
|
||||
GLfloat a[4];
|
||||
GLuint result[4];
|
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GLhalfNV hx, hy;
|
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GLuint *rawResult = (GLuint *) result;
|
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GLuint twoHalves;
|
||||
fetch_vector4(&inst->SrcReg[0], machine, a);
|
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hx = _mesa_float_to_half(a[0]);
|
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hy = _mesa_float_to_half(a[1]);
|
||||
twoHalves = hx | (hy << 16);
|
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rawResult[0] = rawResult[1] = rawResult[2] = rawResult[3]
|
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= twoHalves;
|
||||
store_vector4(inst, machine, result);
|
||||
result[0] =
|
||||
result[1] =
|
||||
result[2] =
|
||||
result[3] = hx | (hy << 16);
|
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store_vector4ui(inst, machine, result);
|
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}
|
||||
break;
|
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case OPCODE_PK2US: /* pack two GLushorts into one 32-bit float */
|
||||
{
|
||||
GLfloat a[4], result[4];
|
||||
GLuint usx, usy, *rawResult = (GLuint *) result;
|
||||
GLfloat a[4];
|
||||
GLuint result[4], usx, usy;
|
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fetch_vector4(&inst->SrcReg[0], machine, a);
|
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a[0] = CLAMP(a[0], 0.0F, 1.0F);
|
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a[1] = CLAMP(a[1], 0.0F, 1.0F);
|
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usx = IROUND(a[0] * 65535.0F);
|
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usy = IROUND(a[1] * 65535.0F);
|
||||
rawResult[0] = rawResult[1] = rawResult[2] = rawResult[3]
|
||||
= usx | (usy << 16);
|
||||
store_vector4(inst, machine, result);
|
||||
result[0] =
|
||||
result[1] =
|
||||
result[2] =
|
||||
result[3] = usx | (usy << 16);
|
||||
store_vector4ui(inst, machine, result);
|
||||
}
|
||||
break;
|
||||
case OPCODE_PK4B: /* pack four GLbytes into one 32-bit float */
|
||||
{
|
||||
GLfloat a[4], result[4];
|
||||
GLuint ubx, uby, ubz, ubw, *rawResult = (GLuint *) result;
|
||||
GLfloat a[4];
|
||||
GLuint result[4], ubx, uby, ubz, ubw;
|
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fetch_vector4(&inst->SrcReg[0], machine, a);
|
||||
a[0] = CLAMP(a[0], -128.0F / 127.0F, 1.0F);
|
||||
a[1] = CLAMP(a[1], -128.0F / 127.0F, 1.0F);
|
||||
@@ -1062,15 +1270,17 @@ _mesa_execute_program(GLcontext * ctx,
|
||||
uby = IROUND(127.0F * a[1] + 128.0F);
|
||||
ubz = IROUND(127.0F * a[2] + 128.0F);
|
||||
ubw = IROUND(127.0F * a[3] + 128.0F);
|
||||
rawResult[0] = rawResult[1] = rawResult[2] = rawResult[3]
|
||||
= ubx | (uby << 8) | (ubz << 16) | (ubw << 24);
|
||||
store_vector4(inst, machine, result);
|
||||
result[0] =
|
||||
result[1] =
|
||||
result[2] =
|
||||
result[3] = ubx | (uby << 8) | (ubz << 16) | (ubw << 24);
|
||||
store_vector4ui(inst, machine, result);
|
||||
}
|
||||
break;
|
||||
case OPCODE_PK4UB: /* pack four GLubytes into one 32-bit float */
|
||||
{
|
||||
GLfloat a[4], result[4];
|
||||
GLuint ubx, uby, ubz, ubw, *rawResult = (GLuint *) result;
|
||||
GLfloat a[4];
|
||||
GLuint result[4], ubx, uby, ubz, ubw;
|
||||
fetch_vector4(&inst->SrcReg[0], machine, a);
|
||||
a[0] = CLAMP(a[0], 0.0F, 1.0F);
|
||||
a[1] = CLAMP(a[1], 0.0F, 1.0F);
|
||||
@@ -1080,9 +1290,11 @@ _mesa_execute_program(GLcontext * ctx,
|
||||
uby = IROUND(255.0F * a[1]);
|
||||
ubz = IROUND(255.0F * a[2]);
|
||||
ubw = IROUND(255.0F * a[3]);
|
||||
rawResult[0] = rawResult[1] = rawResult[2] = rawResult[3]
|
||||
= ubx | (uby << 8) | (ubz << 16) | (ubw << 24);
|
||||
store_vector4(inst, machine, result);
|
||||
result[0] =
|
||||
result[1] =
|
||||
result[2] =
|
||||
result[3] = ubx | (uby << 8) | (ubz << 16) | (ubw << 24);
|
||||
store_vector4ui(inst, machine, result);
|
||||
}
|
||||
break;
|
||||
case OPCODE_POW:
|
||||
@@ -1278,6 +1490,17 @@ _mesa_execute_program(GLcontext * ctx,
|
||||
}
|
||||
}
|
||||
break;
|
||||
case OPCODE_SSG: /* set sign (-1, 0 or +1) */
|
||||
{
|
||||
GLfloat a[4], result[4];
|
||||
fetch_vector4(&inst->SrcReg[0], machine, a);
|
||||
result[0] = (GLfloat) ((a[0] > 0.0F) - (a[0] < 0.0F));
|
||||
result[1] = (GLfloat) ((a[1] > 0.0F) - (a[1] < 0.0F));
|
||||
result[2] = (GLfloat) ((a[2] > 0.0F) - (a[2] < 0.0F));
|
||||
result[3] = (GLfloat) ((a[3] > 0.0F) - (a[3] < 0.0F));
|
||||
store_vector4(inst, machine, result);
|
||||
}
|
||||
break;
|
||||
case OPCODE_STR: /* set true, operands ignored */
|
||||
{
|
||||
static const GLfloat result[4] = { 1.0F, 1.0F, 1.0F, 1.0F };
|
||||
@@ -1476,6 +1699,18 @@ _mesa_execute_program(GLcontext * ctx,
|
||||
store_vector4(inst, machine, result);
|
||||
}
|
||||
break;
|
||||
case OPCODE_XOR: /* bitwise XOR */
|
||||
{
|
||||
GLuint a[4], b[4], result[4];
|
||||
fetch_vector4ui(&inst->SrcReg[0], machine, a);
|
||||
fetch_vector4ui(&inst->SrcReg[1], machine, b);
|
||||
result[0] = a[0] ^ b[0];
|
||||
result[1] = a[1] ^ b[1];
|
||||
result[2] = a[2] ^ b[2];
|
||||
result[3] = a[3] ^ b[3];
|
||||
store_vector4ui(inst, machine, result);
|
||||
}
|
||||
break;
|
||||
case OPCODE_XPD: /* cross product */
|
||||
{
|
||||
GLfloat a[4], b[4], result[4];
|
||||
|
||||
@@ -154,6 +154,7 @@ static const struct instruction_info InstInfo[MAX_OPCODE] = {
|
||||
{ OPCODE_NOP, "NOP", 0, 0 },
|
||||
{ OPCODE_ABS, "ABS", 1, 1 },
|
||||
{ OPCODE_ADD, "ADD", 2, 1 },
|
||||
{ OPCODE_AND, "AND", 2, 1 },
|
||||
{ OPCODE_ARA, "ARA", 1, 1 },
|
||||
{ OPCODE_ARL, "ARL", 1, 1 },
|
||||
{ OPCODE_ARL_NV, "ARL", 1, 1 },
|
||||
@@ -168,6 +169,8 @@ static const struct instruction_info InstInfo[MAX_OPCODE] = {
|
||||
{ OPCODE_COS, "COS", 1, 1 },
|
||||
{ OPCODE_DDX, "DDX", 1, 1 },
|
||||
{ OPCODE_DDY, "DDY", 1, 1 },
|
||||
{ OPCODE_DP2, "DP2", 2, 1 },
|
||||
{ OPCODE_DP2A, "DP2A", 3, 1 },
|
||||
{ OPCODE_DP3, "DP3", 2, 1 },
|
||||
{ OPCODE_DP4, "DP4", 2, 1 },
|
||||
{ OPCODE_DPH, "DPH", 2, 1 },
|
||||
@@ -193,10 +196,14 @@ static const struct instruction_info InstInfo[MAX_OPCODE] = {
|
||||
{ OPCODE_MIN, "MIN", 2, 1 },
|
||||
{ OPCODE_MOV, "MOV", 1, 1 },
|
||||
{ OPCODE_MUL, "MUL", 2, 1 },
|
||||
{ OPCODE_NOT, "NOT", 1, 1 },
|
||||
{ OPCODE_NOISE1, "NOISE1", 1, 1 },
|
||||
{ OPCODE_NOISE2, "NOISE2", 1, 1 },
|
||||
{ OPCODE_NOISE3, "NOISE3", 1, 1 },
|
||||
{ OPCODE_NOISE4, "NOISE4", 1, 1 },
|
||||
{ OPCODE_OR, "OR", 2, 1 },
|
||||
{ OPCODE_NRM3, "NRM3", 1, 1 },
|
||||
{ OPCODE_NRM4, "NRM4", 1, 1 },
|
||||
{ OPCODE_PK2H, "PK2H", 1, 1 },
|
||||
{ OPCODE_PK2US, "PK2US", 1, 1 },
|
||||
{ OPCODE_PK4B, "PK4B", 1, 1 },
|
||||
@@ -235,6 +242,7 @@ static const struct instruction_info InstInfo[MAX_OPCODE] = {
|
||||
{ OPCODE_UP4B, "UP4B", 1, 1 },
|
||||
{ OPCODE_UP4UB, "UP4UB", 1, 1 },
|
||||
{ OPCODE_X2D, "X2D", 3, 1 },
|
||||
{ OPCODE_XOR, "XOR", 2, 1 },
|
||||
{ OPCODE_XPD, "XPD", 2, 1 }
|
||||
};
|
||||
|
||||
|
||||
@@ -145,6 +145,7 @@ typedef enum prog_opcode {
|
||||
OPCODE_NOP = 0, /* X */
|
||||
OPCODE_ABS, /* X X 1.1 X */
|
||||
OPCODE_ADD, /* X X X X X */
|
||||
OPCODE_AND, /* */
|
||||
OPCODE_ARA, /* 2 */
|
||||
OPCODE_ARL, /* X X */
|
||||
OPCODE_ARL_NV, /* 2 */
|
||||
@@ -159,6 +160,8 @@ typedef enum prog_opcode {
|
||||
OPCODE_COS, /* X 2 X X */
|
||||
OPCODE_DDX, /* X X */
|
||||
OPCODE_DDY, /* X X */
|
||||
OPCODE_DP2, /* 2 */
|
||||
OPCODE_DP2A, /* 2 */
|
||||
OPCODE_DP3, /* X X X X X */
|
||||
OPCODE_DP4, /* X X X X X */
|
||||
OPCODE_DPH, /* X X 1.1 */
|
||||
@@ -188,6 +191,10 @@ typedef enum prog_opcode {
|
||||
OPCODE_NOISE2, /* X */
|
||||
OPCODE_NOISE3, /* X */
|
||||
OPCODE_NOISE4, /* X */
|
||||
OPCODE_NOT, /* */
|
||||
OPCODE_NRM3, /* */
|
||||
OPCODE_NRM4, /* */
|
||||
OPCODE_OR, /* */
|
||||
OPCODE_PK2H, /* X */
|
||||
OPCODE_PK2US, /* X */
|
||||
OPCODE_PK4B, /* X */
|
||||
@@ -226,6 +233,7 @@ typedef enum prog_opcode {
|
||||
OPCODE_UP4B, /* X */
|
||||
OPCODE_UP4UB, /* X */
|
||||
OPCODE_X2D, /* X */
|
||||
OPCODE_XOR, /* */
|
||||
OPCODE_XPD, /* X X X */
|
||||
MAX_OPCODE
|
||||
} gl_inst_opcode;
|
||||
|
||||
@@ -413,6 +413,9 @@ static slang_asm_info AsmInfo[] = {
|
||||
{ "vec4_multiply", IR_MUL, 1, 2 },
|
||||
{ "vec4_dot", IR_DOT4, 1, 2 },
|
||||
{ "vec3_dot", IR_DOT3, 1, 2 },
|
||||
{ "vec2_dot", IR_DOT2, 1, 2 },
|
||||
{ "vec3_nrm", IR_NRM3, 1, 1 },
|
||||
{ "vec4_nrm", IR_NRM4, 1, 1 },
|
||||
{ "vec3_cross", IR_CROSS, 1, 2 },
|
||||
{ "vec4_lrp", IR_LRP, 1, 3 },
|
||||
{ "vec4_min", IR_MIN, 1, 2 },
|
||||
|
||||
@@ -488,6 +488,9 @@ instruction_annotation(gl_inst_opcode opcode, char *dstAnnot,
|
||||
case OPCODE_MUL:
|
||||
operator = "*";
|
||||
break;
|
||||
case OPCODE_DP2:
|
||||
operator = "DP2";
|
||||
break;
|
||||
case OPCODE_DP3:
|
||||
operator = "DP3";
|
||||
break;
|
||||
@@ -708,7 +711,7 @@ emit_compare(slang_emit_info *emitInfo, slang_ir_node *n)
|
||||
}
|
||||
else {
|
||||
assert(size == 2);
|
||||
dotOp = OPCODE_DP3;
|
||||
dotOp = OPCODE_DP3; /* XXX use OPCODE_DP2 eventually */
|
||||
swizzle = MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y);
|
||||
}
|
||||
|
||||
@@ -1893,12 +1896,15 @@ emit(slang_emit_info *emitInfo, slang_ir_node *n)
|
||||
case IR_NOISE2:
|
||||
case IR_NOISE3:
|
||||
case IR_NOISE4:
|
||||
case IR_NRM4:
|
||||
case IR_NRM3:
|
||||
/* binary */
|
||||
case IR_ADD:
|
||||
case IR_SUB:
|
||||
case IR_MUL:
|
||||
case IR_DOT4:
|
||||
case IR_DOT3:
|
||||
case IR_DOT2:
|
||||
case IR_CROSS:
|
||||
case IR_MIN:
|
||||
case IR_MAX:
|
||||
|
||||
@@ -27,6 +27,7 @@
|
||||
#include "main/context.h"
|
||||
#include "slang_ir.h"
|
||||
#include "slang_mem.h"
|
||||
#include "shader/prog_instruction.h"
|
||||
#include "shader/prog_print.h"
|
||||
|
||||
|
||||
@@ -36,8 +37,11 @@ static const slang_ir_info IrInfo[] = {
|
||||
{ IR_SUB, "IR_SUB", OPCODE_SUB, 4, 2 },
|
||||
{ IR_MUL, "IR_MUL", OPCODE_MUL, 4, 2 },
|
||||
{ IR_DIV, "IR_DIV", OPCODE_NOP, 0, 2 }, /* XXX broke */
|
||||
{ IR_DOT4, "IR_DOT_4", OPCODE_DP4, 1, 2 },
|
||||
{ IR_DOT3, "IR_DOT_3", OPCODE_DP3, 1, 2 },
|
||||
{ IR_DOT4, "IR_DOT4", OPCODE_DP4, 1, 2 },
|
||||
{ IR_DOT3, "IR_DOT3", OPCODE_DP3, 1, 2 },
|
||||
{ IR_DOT2, "IR_DOT2", OPCODE_DP2, 1, 2 },
|
||||
{ IR_NRM4, "IR_NRM4", OPCODE_NRM4, 1, 1 },
|
||||
{ IR_NRM3, "IR_NRM3", OPCODE_NRM3, 1, 1 },
|
||||
{ IR_CROSS, "IR_CROSS", OPCODE_XPD, 3, 2 },
|
||||
{ IR_LRP, "IR_LRP", OPCODE_LRP, 4, 3 },
|
||||
{ IR_MIN, "IR_MIN", OPCODE_MIN, 4, 2 },
|
||||
|
||||
@@ -83,6 +83,9 @@ typedef enum
|
||||
IR_DIV,
|
||||
IR_DOT4,
|
||||
IR_DOT3,
|
||||
IR_DOT2,
|
||||
IR_NRM4,
|
||||
IR_NRM3,
|
||||
IR_CROSS, /* vec3 cross product */
|
||||
IR_LRP,
|
||||
IR_CLAMP,
|
||||
|
||||
Reference in New Issue
Block a user