AlexIndustrial/mesa
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

r600/sfn: Don't put b2f64 conversion into ALU group

Browse Source 
There is no need to pin the ops into channels because
these are 32 bit ops that can be executed independent
from each other.

Fixes: 79ca456b48
     r600/sfn: rewrite NIR backend

v2: grammar fixes (lorn10)

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28840>
This commit is contained in:
Gert Wollny
2024-04-20 23:54:57 +02:00
committed by Marge Bot
parent 07995b98a8
commit 2bb102f020
1 changed files with 3 additions and 8 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/gallium/drivers/r600/sfn/sfn_instr_alu.cpp
+3 -8
View File
@@ -2210,27 +2210,22 @@ static bool
emit_alu_b2f64(const nir_alu_instr& alu, Shader& shader)
{
auto& value_factory = shader.value_factory();
auto group = new AluGroup();
AluInstr *ir = nullptr;
for (unsigned i = 0; i < alu.def.num_components; ++i) {
ir = new AluInstr(op2_and_int,
auto ir = new AluInstr(op2_and_int,
value_factory.dest(alu.def, 2 * i, pin_group),
value_factory.src(alu.src[0], i),
value_factory.zero(),
{alu_write});
group->add_instruction(ir);
shader.emit_instruction(ir);
ir = new AluInstr(op2_and_int,
value_factory.dest(alu.def, 2 * i + 1, pin_group),
value_factory.src(alu.src[0], i),
value_factory.literal(0x3ff00000),
{alu_write});
group->add_instruction(ir);
shader.emit_instruction(ir);
}
if (ir)
ir->set_alu_flag(alu_last_instr);
shader.emit_instruction(group);
return true;
}