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radv: do not overallocate the number of exports for streamout on GFX12

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This shouldn't be needed because GE_GS_OREDERD_ID is always reset to 0
when streamout is started. Thus it's technically impossible that the
ordered ID is more than 12-bit.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33017>
This commit is contained in:
Samuel Pitoiset
2025-01-20 06:23:31 -08:00
committed by Marge Bot
parent d4ff011b12
commit 1f253700bc
1 changed files with 1 additions and 13 deletions
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src/amd/vulkan/radv_shader.c
+1 -13
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@@ -1535,19 +1535,7 @@ radv_precompute_registers_hw_ngg(struct radv_device *device, const struct ac_sha
const unsigned num_prim_params = info->outinfo.prim_param_exports;
if (pdev->info.gfx_level >= GFX12) {
unsigned num_params = info->outinfo.param_exports;
/* Since there is no alloc/dealloc mechanism for the 12-bit ordered IDs, they can wrap
* around if there are more than 2^12 workgroups, causing 2 workgroups to get the same
* ordered ID, which would break the streamout algorithm.
* The recommended solution is to use the alloc/dealloc mechanism of the attribute ring,
* which is enough to limit the range of ordered IDs that can be in flight.
*/
if (info->so.num_outputs) {
num_params = MAX2(num_params, 8);
} else {
num_params = MAX2(num_params, 1);
}
const unsigned num_params = MAX2(info->outinfo.param_exports, 1);
info->regs.spi_vs_out_config = S_00B0C4_VS_EXPORT_COUNT(num_params - 1) |
S_00B0C4_PRIM_EXPORT_COUNT(num_prim_params) | S_00B0C4_NO_PC_EXPORT(no_pc_export);