radv: rename rast_prim to vgt_outprim_type everywhere
To avoid confusion between the primitive topology and the output rasterized primitive. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36912>
This commit is contained in:
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Marge Bot
parent
5dec043cee
commit
19c712c8ef
@@ -13,7 +13,7 @@
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typedef struct {
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bool dynamic_rasterization_samples;
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unsigned num_rasterization_samples;
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unsigned rast_prim;
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unsigned vgt_outprim_type;
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} lower_fs_barycentric_state;
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static nir_def *
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@@ -192,11 +192,11 @@ lower_load_barycentric_coord(nir_builder *b, nir_intrinsic_instr *intrin, void *
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b->cursor = nir_after_instr(&intrin->instr);
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/* When the rasterization primitive isn't known at compile time (GPL), load it. */
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if (state->rast_prim == -1) {
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nir_def *rast_prim = nir_load_rasterization_primitive_amd(b);
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if (state->vgt_outprim_type == -1) {
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nir_def *vgt_outprim_type = nir_load_rasterization_primitive_amd(b);
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nir_def *res1, *res2;
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nir_def *is_point = nir_ieq_imm(b, rast_prim, V_028A6C_POINTLIST);
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nir_def *is_point = nir_ieq_imm(b, vgt_outprim_type, V_028A6C_POINTLIST);
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nir_if *if_point = nir_push_if(b, is_point);
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{
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res1 = lower_point(b);
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@@ -209,7 +209,7 @@ lower_load_barycentric_coord(nir_builder *b, nir_intrinsic_instr *intrin, void *
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p1 = nir_channel(b, interp, 0);
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p2 = nir_channel(b, interp, 1);
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nir_def *is_line = nir_ieq_imm(b, rast_prim, V_028A6C_LINESTRIP);
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nir_def *is_line = nir_ieq_imm(b, vgt_outprim_type, V_028A6C_LINESTRIP);
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nir_if *if_line = nir_push_if(b, is_line);
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{
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res_line = lower_line(b, p1, p2);
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@@ -226,17 +226,17 @@ lower_load_barycentric_coord(nir_builder *b, nir_intrinsic_instr *intrin, void *
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new_dest = nir_if_phi(b, res1, res2);
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} else {
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if (state->rast_prim == V_028A6C_POINTLIST) {
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if (state->vgt_outprim_type == V_028A6C_POINTLIST) {
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new_dest = lower_point(b);
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} else {
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interp = get_interp_param(b, state, intrin);
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p1 = nir_channel(b, interp, 0);
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p2 = nir_channel(b, interp, 1);
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if (state->rast_prim == V_028A6C_LINESTRIP) {
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if (state->vgt_outprim_type == V_028A6C_LINESTRIP) {
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new_dest = lower_line(b, p1, p2);
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} else {
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assert(state->rast_prim == V_028A6C_TRISTRIP);
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assert(state->vgt_outprim_type == V_028A6C_TRISTRIP);
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new_dest = lower_triangle(b, p1, p2);
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}
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}
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@@ -248,12 +248,13 @@ lower_load_barycentric_coord(nir_builder *b, nir_intrinsic_instr *intrin, void *
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}
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bool
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radv_nir_lower_fs_barycentric(nir_shader *shader, const struct radv_graphics_state_key *gfx_state, unsigned rast_prim)
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radv_nir_lower_fs_barycentric(nir_shader *shader, const struct radv_graphics_state_key *gfx_state,
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unsigned vgt_outprim_type)
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{
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lower_fs_barycentric_state state = {
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.dynamic_rasterization_samples = gfx_state->dynamic_rasterization_samples,
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.num_rasterization_samples = gfx_state->ms.rasterization_samples,
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.rast_prim = rast_prim,
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.vgt_outprim_type = vgt_outprim_type,
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};
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return nir_shader_intrinsics_pass(shader, lower_load_barycentric_coord, nir_metadata_none, &state);
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@@ -1014,7 +1014,7 @@ radv_emit_descriptors_per_stage(const struct radv_device *device, struct radv_cm
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}
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static unsigned
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radv_get_rasterization_prim(const struct radv_cmd_buffer *cmd_buffer)
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radv_get_vgt_outprim_type(const struct radv_cmd_buffer *cmd_buffer)
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{
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const struct radv_shader *last_vgt_shader = cmd_buffer->state.last_vgt_shader;
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const struct radv_dynamic_state *d = &cmd_buffer->state.dynamic;
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@@ -1023,7 +1023,7 @@ radv_get_rasterization_prim(const struct radv_cmd_buffer *cmd_buffer)
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(VK_SHADER_STAGE_TESSELLATION_CONTROL_BIT | VK_SHADER_STAGE_TESSELLATION_EVALUATION_BIT |
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VK_SHADER_STAGE_GEOMETRY_BIT | VK_SHADER_STAGE_MESH_BIT_EXT)) {
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/* Ignore dynamic primitive topology for TES/GS/MS stages. */
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return cmd_buffer->state.rast_prim;
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return cmd_buffer->state.vgt_outprim_type;
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}
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return radv_conv_prim_to_gs_out(d->vk.ia.primitive_topology, last_vgt_shader->info.is_ngg);
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@@ -1034,10 +1034,11 @@ radv_get_line_mode(const struct radv_cmd_buffer *cmd_buffer)
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{
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const struct radv_dynamic_state *d = &cmd_buffer->state.dynamic;
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const unsigned rast_prim = radv_get_rasterization_prim(cmd_buffer);
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const unsigned vgt_outprim_type = radv_get_vgt_outprim_type(cmd_buffer);
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const bool draw_lines = (radv_rast_prim_is_line(rast_prim) && !radv_polygon_mode_is_point(d->vk.rs.polygon_mode)) ||
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(radv_polygon_mode_is_line(d->vk.rs.polygon_mode) && !radv_rast_prim_is_point(rast_prim));
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const bool draw_lines =
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(radv_vgt_outprim_is_line(vgt_outprim_type) && !radv_polygon_mode_is_point(d->vk.rs.polygon_mode)) ||
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(radv_polygon_mode_is_line(d->vk.rs.polygon_mode) && !radv_vgt_outprim_is_point(vgt_outprim_type));
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if (draw_lines)
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return d->vk.rs.line.mode;
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@@ -3405,7 +3406,7 @@ radv_emit_vgt_prim_state(struct radv_cmd_buffer *cmd_buffer)
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{
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struct radv_device *device = radv_cmd_buffer_device(cmd_buffer);
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const struct radv_physical_device *pdev = radv_device_physical(device);
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const uint32_t vgt_gs_out_prim_type = radv_get_rasterization_prim(cmd_buffer);
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const uint32_t vgt_outprim_type = radv_get_vgt_outprim_type(cmd_buffer);
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const struct radv_dynamic_state *d = &cmd_buffer->state.dynamic;
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struct radv_cmd_stream *cs = cmd_buffer->cs;
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@@ -3424,7 +3425,7 @@ radv_emit_vgt_prim_state(struct radv_cmd_buffer *cmd_buffer)
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}
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radeon_end();
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radv_emit_vgt_gs_out(cmd_buffer, vgt_gs_out_prim_type);
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radv_emit_vgt_gs_out(cmd_buffer, vgt_outprim_type);
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cmd_buffer->state.dirty &= ~RADV_CMD_DIRTY_VGT_PRIM_STATE;
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}
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@@ -4820,9 +4821,11 @@ radv_emit_guardband_state(struct radv_cmd_buffer *cmd_buffer)
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struct radv_device *device = radv_cmd_buffer_device(cmd_buffer);
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const struct radv_physical_device *pdev = radv_device_physical(device);
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const struct radv_dynamic_state *d = &cmd_buffer->state.dynamic;
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unsigned rast_prim = radv_get_rasterization_prim(cmd_buffer);
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const bool draw_points = radv_rast_prim_is_point(rast_prim) || radv_polygon_mode_is_point(d->vk.rs.polygon_mode);
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const bool draw_lines = radv_rast_prim_is_line(rast_prim) || radv_polygon_mode_is_line(d->vk.rs.polygon_mode);
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unsigned vgt_outprim_type = radv_get_vgt_outprim_type(cmd_buffer);
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const bool draw_points =
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radv_vgt_outprim_is_point(vgt_outprim_type) || radv_polygon_mode_is_point(d->vk.rs.polygon_mode);
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const bool draw_lines =
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radv_vgt_outprim_is_line(vgt_outprim_type) || radv_polygon_mode_is_line(d->vk.rs.polygon_mode);
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struct radv_cmd_stream *cs = cmd_buffer->cs;
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int i;
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float guardband_x = INFINITY, guardband_y = INFINITY;
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@@ -7877,18 +7880,18 @@ radv_CmdBindPipeline(VkCommandBuffer commandBuffer, VkPipelineBindPoint pipeline
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cmd_buffer->state.dirty |= RADV_CMD_DIRTY_FRAMEBUFFER;
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}
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if (cmd_buffer->state.rast_prim != graphics_pipeline->rast_prim) {
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if (cmd_buffer->state.vgt_outprim_type != graphics_pipeline->vgt_outprim_type) {
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cmd_buffer->state.dirty_dynamic |= RADV_DYNAMIC_PRIMITIVE_TOPOLOGY;
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if (radv_rast_prim_is_points_or_lines(cmd_buffer->state.rast_prim) !=
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radv_rast_prim_is_points_or_lines(graphics_pipeline->rast_prim))
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if (radv_vgt_outprim_is_point_or_line(cmd_buffer->state.vgt_outprim_type) !=
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radv_vgt_outprim_is_point_or_line(graphics_pipeline->vgt_outprim_type))
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cmd_buffer->state.dirty |= RADV_CMD_DIRTY_GUARDBAND;
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if (radv_rast_prim_is_line(cmd_buffer->state.rast_prim) !=
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radv_rast_prim_is_line(graphics_pipeline->rast_prim))
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if (radv_vgt_outprim_is_line(cmd_buffer->state.vgt_outprim_type) !=
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radv_vgt_outprim_is_line(graphics_pipeline->vgt_outprim_type))
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cmd_buffer->state.dirty_dynamic |= RADV_DYNAMIC_RASTERIZATION_SAMPLES;
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cmd_buffer->state.rast_prim = graphics_pipeline->rast_prim;
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cmd_buffer->state.vgt_outprim_type = graphics_pipeline->vgt_outprim_type;
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}
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if (cmd_buffer->state.uses_out_of_order_rast != graphics_pipeline->uses_out_of_order_rast ||
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@@ -10477,11 +10480,11 @@ radv_emit_fs_state(struct radv_cmd_buffer *cmd_buffer)
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const unsigned rasterization_samples = radv_get_rasterization_samples(cmd_buffer);
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const unsigned ps_iter_samples = radv_get_ps_iter_samples(cmd_buffer);
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const uint16_t ps_iter_mask = ac_get_ps_iter_mask(ps_iter_samples);
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const unsigned rast_prim = radv_get_rasterization_prim(cmd_buffer);
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const unsigned vgt_outprim_type = radv_get_vgt_outprim_type(cmd_buffer);
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const unsigned ps_state = SET_SGPR_FIELD(PS_STATE_NUM_SAMPLES, rasterization_samples) |
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SET_SGPR_FIELD(PS_STATE_PS_ITER_MASK, ps_iter_mask) |
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SET_SGPR_FIELD(PS_STATE_LINE_RAST_MODE, radv_get_line_mode(cmd_buffer)) |
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SET_SGPR_FIELD(PS_STATE_RAST_PRIM, rast_prim);
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SET_SGPR_FIELD(PS_STATE_RAST_PRIM, vgt_outprim_type);
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radeon_begin(cmd_buffer->cs);
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if (pdev->info.gfx_level >= GFX12) {
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@@ -11717,7 +11720,7 @@ radv_bind_graphics_shaders(struct radv_cmd_buffer *cmd_buffer)
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if (cmd_buffer->state.active_stages &
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(VK_SHADER_STAGE_TESSELLATION_CONTROL_BIT | VK_SHADER_STAGE_TESSELLATION_EVALUATION_BIT |
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VK_SHADER_STAGE_GEOMETRY_BIT | VK_SHADER_STAGE_MESH_BIT_EXT)) {
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cmd_buffer->state.rast_prim = radv_get_vgt_gs_out(cmd_buffer->state.shaders, 0, false);
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cmd_buffer->state.vgt_outprim_type = radv_get_vgt_gs_out(cmd_buffer->state.shaders, 0, false);
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}
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const struct radv_shader *vs = radv_get_shader(cmd_buffer->state.shaders, MESA_SHADER_VERTEX);
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@@ -14661,7 +14664,7 @@ radv_reset_pipeline_state(struct radv_cmd_buffer *cmd_buffer, VkPipelineBindPoin
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cmd_buffer->state.emitted_vs_prolog = NULL;
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cmd_buffer->state.ms.sample_shading_enable = false;
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cmd_buffer->state.ms.min_sample_shading = 1.0f;
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cmd_buffer->state.rast_prim = 0;
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cmd_buffer->state.vgt_outprim_type = 0;
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cmd_buffer->state.uses_out_of_order_rast = false;
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cmd_buffer->state.uses_vrs_attachment = false;
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}
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@@ -532,7 +532,7 @@ struct radv_cmd_state {
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unsigned last_cb_target_mask;
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unsigned rast_prim;
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unsigned vgt_outprim_type;
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uint32_t vtx_base_sgpr;
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uint8_t vtx_emit_num;
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@@ -2563,28 +2563,28 @@ radv_pipeline_load_retained_shaders(const struct radv_device *device, const VkGr
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}
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static unsigned
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radv_get_rasterization_prim(const struct radv_shader_stage *stages, const struct radv_graphics_state_key *gfx_state)
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radv_get_vgt_outprim_type(const struct radv_shader_stage *stages, const struct radv_graphics_state_key *gfx_state)
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{
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unsigned rast_prim;
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unsigned vgt_outprim_type;
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if (gfx_state->unknown_rast_prim)
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return -1;
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if (stages[MESA_SHADER_GEOMETRY].nir) {
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rast_prim = radv_conv_gl_prim_to_gs_out(stages[MESA_SHADER_GEOMETRY].nir->info.gs.output_primitive);
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vgt_outprim_type = radv_conv_gl_prim_to_gs_out(stages[MESA_SHADER_GEOMETRY].nir->info.gs.output_primitive);
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} else if (stages[MESA_SHADER_TESS_EVAL].nir) {
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if (stages[MESA_SHADER_TESS_EVAL].nir->info.tess.point_mode) {
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rast_prim = V_028A6C_POINTLIST;
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vgt_outprim_type = V_028A6C_POINTLIST;
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} else {
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rast_prim = radv_conv_tess_prim_to_gs_out(stages[MESA_SHADER_TESS_EVAL].nir->info.tess._primitive_mode);
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vgt_outprim_type = radv_conv_tess_prim_to_gs_out(stages[MESA_SHADER_TESS_EVAL].nir->info.tess._primitive_mode);
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}
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} else if (stages[MESA_SHADER_MESH].nir) {
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rast_prim = radv_conv_gl_prim_to_gs_out(stages[MESA_SHADER_MESH].nir->info.mesh.primitive_type);
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vgt_outprim_type = radv_conv_gl_prim_to_gs_out(stages[MESA_SHADER_MESH].nir->info.mesh.primitive_type);
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} else {
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rast_prim = radv_conv_prim_to_gs_out(gfx_state->ia.topology, false);
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vgt_outprim_type = radv_conv_prim_to_gs_out(gfx_state->ia.topology, false);
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}
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return rast_prim;
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return vgt_outprim_type;
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}
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static bool
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@@ -2773,9 +2773,9 @@ radv_graphics_shaders_compile(struct radv_device *device, struct vk_pipeline_cac
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radv_graphics_shaders_link(device, gfx_state, stages);
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if (stages[MESA_SHADER_FRAGMENT].nir) {
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unsigned rast_prim = radv_get_rasterization_prim(stages, gfx_state);
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unsigned vgt_outprim_type = radv_get_vgt_outprim_type(stages, gfx_state);
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NIR_PASS(_, stages[MESA_SHADER_FRAGMENT].nir, radv_nir_lower_fs_barycentric, gfx_state, rast_prim);
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NIR_PASS(_, stages[MESA_SHADER_FRAGMENT].nir, radv_nir_lower_fs_barycentric, gfx_state, vgt_outprim_type);
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NIR_PASS(_, stages[MESA_SHADER_FRAGMENT].nir, nir_lower_fragcoord_wtrans);
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@@ -3523,7 +3523,7 @@ radv_graphics_pipeline_init(struct radv_graphics_pipeline *pipeline, struct radv
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return result;
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}
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uint32_t vgt_gs_out_prim_type = radv_pipeline_init_vgt_gs_out(pipeline, &gfx_state.vk);
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uint32_t vgt_outprim_type = radv_pipeline_init_vgt_gs_out(pipeline, &gfx_state.vk);
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radv_pipeline_init_multisample_state(device, pipeline, pCreateInfo, &gfx_state.vk);
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@@ -3539,7 +3539,7 @@ radv_graphics_pipeline_init(struct radv_graphics_pipeline *pipeline, struct radv
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pipeline->is_ngg = pipeline->base.shaders[pipeline->last_vgt_api_stage]->info.is_ngg;
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pipeline->has_ngg_culling = pipeline->base.shaders[pipeline->last_vgt_api_stage]->info.has_ngg_culling;
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pipeline->force_vrs_per_vertex = pipeline->base.shaders[pipeline->last_vgt_api_stage]->info.force_vrs_per_vertex;
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pipeline->rast_prim = vgt_gs_out_prim_type;
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pipeline->vgt_outprim_type = vgt_outprim_type;
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pipeline->uses_out_of_order_rast = gfx_state.vk.rs->rasterization_order_amd == VK_RASTERIZATION_ORDER_RELAXED_AMD;
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pipeline->uses_vrs = radv_is_vrs_enabled(&gfx_state.vk);
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pipeline->uses_vrs_attachment = radv_pipeline_uses_vrs_attachment(pipeline, &gfx_state.vk);
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@@ -125,7 +125,7 @@ struct radv_graphics_pipeline {
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/* Last pre-PS API stage */
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mesa_shader_stage last_vgt_api_stage;
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unsigned rast_prim;
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unsigned vgt_outprim_type;
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/* Custom blend mode for internal operations. */
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unsigned custom_blend_mode;
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@@ -291,21 +291,21 @@ radv_prim_is_points_or_lines(unsigned topology)
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}
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static inline bool
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radv_rast_prim_is_point(unsigned rast_prim)
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radv_vgt_outprim_is_point(unsigned vgt_outprim_type)
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{
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return rast_prim == V_028A6C_POINTLIST;
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return vgt_outprim_type == V_028A6C_POINTLIST;
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}
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static inline bool
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radv_rast_prim_is_line(unsigned rast_prim)
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radv_vgt_outprim_is_line(unsigned vgt_outprim_type)
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{
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return rast_prim == V_028A6C_LINESTRIP;
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return vgt_outprim_type == V_028A6C_LINESTRIP;
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}
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static inline bool
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radv_rast_prim_is_points_or_lines(unsigned rast_prim)
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radv_vgt_outprim_is_point_or_line(unsigned vgt_outprim_type)
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{
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return radv_rast_prim_is_point(rast_prim) || radv_rast_prim_is_line(rast_prim);
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return radv_vgt_outprim_is_point(vgt_outprim_type) || radv_vgt_outprim_is_line(vgt_outprim_type);
|
||||
}
|
||||
|
||||
static inline bool
|
||||
|
||||
Reference in New Issue
Block a user