From 19c712c8ef93d8180ba359cc8f0952234c246daf Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Thu, 21 Aug 2025 15:59:19 +0200 Subject: [PATCH] radv: rename rast_prim to vgt_outprim_type everywhere To avoid confusion between the primitive topology and the output rasterized primitive. Signed-off-by: Samuel Pitoiset Part-of: --- .../nir/radv_nir_lower_fs_barycentric.c | 21 ++++----- src/amd/vulkan/radv_cmd_buffer.c | 43 ++++++++++--------- src/amd/vulkan/radv_cmd_buffer.h | 2 +- src/amd/vulkan/radv_pipeline_graphics.c | 24 +++++------ src/amd/vulkan/radv_pipeline_graphics.h | 14 +++--- 5 files changed, 54 insertions(+), 50 deletions(-) diff --git a/src/amd/vulkan/nir/radv_nir_lower_fs_barycentric.c b/src/amd/vulkan/nir/radv_nir_lower_fs_barycentric.c index 3a8d25b1ad1..bedca21571d 100644 --- a/src/amd/vulkan/nir/radv_nir_lower_fs_barycentric.c +++ b/src/amd/vulkan/nir/radv_nir_lower_fs_barycentric.c @@ -13,7 +13,7 @@ typedef struct { bool dynamic_rasterization_samples; unsigned num_rasterization_samples; - unsigned rast_prim; + unsigned vgt_outprim_type; } lower_fs_barycentric_state; static nir_def * @@ -192,11 +192,11 @@ lower_load_barycentric_coord(nir_builder *b, nir_intrinsic_instr *intrin, void * b->cursor = nir_after_instr(&intrin->instr); /* When the rasterization primitive isn't known at compile time (GPL), load it. */ - if (state->rast_prim == -1) { - nir_def *rast_prim = nir_load_rasterization_primitive_amd(b); + if (state->vgt_outprim_type == -1) { + nir_def *vgt_outprim_type = nir_load_rasterization_primitive_amd(b); nir_def *res1, *res2; - nir_def *is_point = nir_ieq_imm(b, rast_prim, V_028A6C_POINTLIST); + nir_def *is_point = nir_ieq_imm(b, vgt_outprim_type, V_028A6C_POINTLIST); nir_if *if_point = nir_push_if(b, is_point); { res1 = lower_point(b); @@ -209,7 +209,7 @@ lower_load_barycentric_coord(nir_builder *b, nir_intrinsic_instr *intrin, void * p1 = nir_channel(b, interp, 0); p2 = nir_channel(b, interp, 1); - nir_def *is_line = nir_ieq_imm(b, rast_prim, V_028A6C_LINESTRIP); + nir_def *is_line = nir_ieq_imm(b, vgt_outprim_type, V_028A6C_LINESTRIP); nir_if *if_line = nir_push_if(b, is_line); { res_line = lower_line(b, p1, p2); @@ -226,17 +226,17 @@ lower_load_barycentric_coord(nir_builder *b, nir_intrinsic_instr *intrin, void * new_dest = nir_if_phi(b, res1, res2); } else { - if (state->rast_prim == V_028A6C_POINTLIST) { + if (state->vgt_outprim_type == V_028A6C_POINTLIST) { new_dest = lower_point(b); } else { interp = get_interp_param(b, state, intrin); p1 = nir_channel(b, interp, 0); p2 = nir_channel(b, interp, 1); - if (state->rast_prim == V_028A6C_LINESTRIP) { + if (state->vgt_outprim_type == V_028A6C_LINESTRIP) { new_dest = lower_line(b, p1, p2); } else { - assert(state->rast_prim == V_028A6C_TRISTRIP); + assert(state->vgt_outprim_type == V_028A6C_TRISTRIP); new_dest = lower_triangle(b, p1, p2); } } @@ -248,12 +248,13 @@ lower_load_barycentric_coord(nir_builder *b, nir_intrinsic_instr *intrin, void * } bool -radv_nir_lower_fs_barycentric(nir_shader *shader, const struct radv_graphics_state_key *gfx_state, unsigned rast_prim) +radv_nir_lower_fs_barycentric(nir_shader *shader, const struct radv_graphics_state_key *gfx_state, + unsigned vgt_outprim_type) { lower_fs_barycentric_state state = { .dynamic_rasterization_samples = gfx_state->dynamic_rasterization_samples, .num_rasterization_samples = gfx_state->ms.rasterization_samples, - .rast_prim = rast_prim, + .vgt_outprim_type = vgt_outprim_type, }; return nir_shader_intrinsics_pass(shader, lower_load_barycentric_coord, nir_metadata_none, &state); diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 878158c25f1..d90b5cf23d8 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -1014,7 +1014,7 @@ radv_emit_descriptors_per_stage(const struct radv_device *device, struct radv_cm } static unsigned -radv_get_rasterization_prim(const struct radv_cmd_buffer *cmd_buffer) +radv_get_vgt_outprim_type(const struct radv_cmd_buffer *cmd_buffer) { const struct radv_shader *last_vgt_shader = cmd_buffer->state.last_vgt_shader; const struct radv_dynamic_state *d = &cmd_buffer->state.dynamic; @@ -1023,7 +1023,7 @@ radv_get_rasterization_prim(const struct radv_cmd_buffer *cmd_buffer) (VK_SHADER_STAGE_TESSELLATION_CONTROL_BIT | VK_SHADER_STAGE_TESSELLATION_EVALUATION_BIT | VK_SHADER_STAGE_GEOMETRY_BIT | VK_SHADER_STAGE_MESH_BIT_EXT)) { /* Ignore dynamic primitive topology for TES/GS/MS stages. */ - return cmd_buffer->state.rast_prim; + return cmd_buffer->state.vgt_outprim_type; } return radv_conv_prim_to_gs_out(d->vk.ia.primitive_topology, last_vgt_shader->info.is_ngg); @@ -1034,10 +1034,11 @@ radv_get_line_mode(const struct radv_cmd_buffer *cmd_buffer) { const struct radv_dynamic_state *d = &cmd_buffer->state.dynamic; - const unsigned rast_prim = radv_get_rasterization_prim(cmd_buffer); + const unsigned vgt_outprim_type = radv_get_vgt_outprim_type(cmd_buffer); - const bool draw_lines = (radv_rast_prim_is_line(rast_prim) && !radv_polygon_mode_is_point(d->vk.rs.polygon_mode)) || - (radv_polygon_mode_is_line(d->vk.rs.polygon_mode) && !radv_rast_prim_is_point(rast_prim)); + const bool draw_lines = + (radv_vgt_outprim_is_line(vgt_outprim_type) && !radv_polygon_mode_is_point(d->vk.rs.polygon_mode)) || + (radv_polygon_mode_is_line(d->vk.rs.polygon_mode) && !radv_vgt_outprim_is_point(vgt_outprim_type)); if (draw_lines) return d->vk.rs.line.mode; @@ -3405,7 +3406,7 @@ radv_emit_vgt_prim_state(struct radv_cmd_buffer *cmd_buffer) { struct radv_device *device = radv_cmd_buffer_device(cmd_buffer); const struct radv_physical_device *pdev = radv_device_physical(device); - const uint32_t vgt_gs_out_prim_type = radv_get_rasterization_prim(cmd_buffer); + const uint32_t vgt_outprim_type = radv_get_vgt_outprim_type(cmd_buffer); const struct radv_dynamic_state *d = &cmd_buffer->state.dynamic; struct radv_cmd_stream *cs = cmd_buffer->cs; @@ -3424,7 +3425,7 @@ radv_emit_vgt_prim_state(struct radv_cmd_buffer *cmd_buffer) } radeon_end(); - radv_emit_vgt_gs_out(cmd_buffer, vgt_gs_out_prim_type); + radv_emit_vgt_gs_out(cmd_buffer, vgt_outprim_type); cmd_buffer->state.dirty &= ~RADV_CMD_DIRTY_VGT_PRIM_STATE; } @@ -4820,9 +4821,11 @@ radv_emit_guardband_state(struct radv_cmd_buffer *cmd_buffer) struct radv_device *device = radv_cmd_buffer_device(cmd_buffer); const struct radv_physical_device *pdev = radv_device_physical(device); const struct radv_dynamic_state *d = &cmd_buffer->state.dynamic; - unsigned rast_prim = radv_get_rasterization_prim(cmd_buffer); - const bool draw_points = radv_rast_prim_is_point(rast_prim) || radv_polygon_mode_is_point(d->vk.rs.polygon_mode); - const bool draw_lines = radv_rast_prim_is_line(rast_prim) || radv_polygon_mode_is_line(d->vk.rs.polygon_mode); + unsigned vgt_outprim_type = radv_get_vgt_outprim_type(cmd_buffer); + const bool draw_points = + radv_vgt_outprim_is_point(vgt_outprim_type) || radv_polygon_mode_is_point(d->vk.rs.polygon_mode); + const bool draw_lines = + radv_vgt_outprim_is_line(vgt_outprim_type) || radv_polygon_mode_is_line(d->vk.rs.polygon_mode); struct radv_cmd_stream *cs = cmd_buffer->cs; int i; float guardband_x = INFINITY, guardband_y = INFINITY; @@ -7877,18 +7880,18 @@ radv_CmdBindPipeline(VkCommandBuffer commandBuffer, VkPipelineBindPoint pipeline cmd_buffer->state.dirty |= RADV_CMD_DIRTY_FRAMEBUFFER; } - if (cmd_buffer->state.rast_prim != graphics_pipeline->rast_prim) { + if (cmd_buffer->state.vgt_outprim_type != graphics_pipeline->vgt_outprim_type) { cmd_buffer->state.dirty_dynamic |= RADV_DYNAMIC_PRIMITIVE_TOPOLOGY; - if (radv_rast_prim_is_points_or_lines(cmd_buffer->state.rast_prim) != - radv_rast_prim_is_points_or_lines(graphics_pipeline->rast_prim)) + if (radv_vgt_outprim_is_point_or_line(cmd_buffer->state.vgt_outprim_type) != + radv_vgt_outprim_is_point_or_line(graphics_pipeline->vgt_outprim_type)) cmd_buffer->state.dirty |= RADV_CMD_DIRTY_GUARDBAND; - if (radv_rast_prim_is_line(cmd_buffer->state.rast_prim) != - radv_rast_prim_is_line(graphics_pipeline->rast_prim)) + if (radv_vgt_outprim_is_line(cmd_buffer->state.vgt_outprim_type) != + radv_vgt_outprim_is_line(graphics_pipeline->vgt_outprim_type)) cmd_buffer->state.dirty_dynamic |= RADV_DYNAMIC_RASTERIZATION_SAMPLES; - cmd_buffer->state.rast_prim = graphics_pipeline->rast_prim; + cmd_buffer->state.vgt_outprim_type = graphics_pipeline->vgt_outprim_type; } if (cmd_buffer->state.uses_out_of_order_rast != graphics_pipeline->uses_out_of_order_rast || @@ -10477,11 +10480,11 @@ radv_emit_fs_state(struct radv_cmd_buffer *cmd_buffer) const unsigned rasterization_samples = radv_get_rasterization_samples(cmd_buffer); const unsigned ps_iter_samples = radv_get_ps_iter_samples(cmd_buffer); const uint16_t ps_iter_mask = ac_get_ps_iter_mask(ps_iter_samples); - const unsigned rast_prim = radv_get_rasterization_prim(cmd_buffer); + const unsigned vgt_outprim_type = radv_get_vgt_outprim_type(cmd_buffer); const unsigned ps_state = SET_SGPR_FIELD(PS_STATE_NUM_SAMPLES, rasterization_samples) | SET_SGPR_FIELD(PS_STATE_PS_ITER_MASK, ps_iter_mask) | SET_SGPR_FIELD(PS_STATE_LINE_RAST_MODE, radv_get_line_mode(cmd_buffer)) | - SET_SGPR_FIELD(PS_STATE_RAST_PRIM, rast_prim); + SET_SGPR_FIELD(PS_STATE_RAST_PRIM, vgt_outprim_type); radeon_begin(cmd_buffer->cs); if (pdev->info.gfx_level >= GFX12) { @@ -11717,7 +11720,7 @@ radv_bind_graphics_shaders(struct radv_cmd_buffer *cmd_buffer) if (cmd_buffer->state.active_stages & (VK_SHADER_STAGE_TESSELLATION_CONTROL_BIT | VK_SHADER_STAGE_TESSELLATION_EVALUATION_BIT | VK_SHADER_STAGE_GEOMETRY_BIT | VK_SHADER_STAGE_MESH_BIT_EXT)) { - cmd_buffer->state.rast_prim = radv_get_vgt_gs_out(cmd_buffer->state.shaders, 0, false); + cmd_buffer->state.vgt_outprim_type = radv_get_vgt_gs_out(cmd_buffer->state.shaders, 0, false); } const struct radv_shader *vs = radv_get_shader(cmd_buffer->state.shaders, MESA_SHADER_VERTEX); @@ -14661,7 +14664,7 @@ radv_reset_pipeline_state(struct radv_cmd_buffer *cmd_buffer, VkPipelineBindPoin cmd_buffer->state.emitted_vs_prolog = NULL; cmd_buffer->state.ms.sample_shading_enable = false; cmd_buffer->state.ms.min_sample_shading = 1.0f; - cmd_buffer->state.rast_prim = 0; + cmd_buffer->state.vgt_outprim_type = 0; cmd_buffer->state.uses_out_of_order_rast = false; cmd_buffer->state.uses_vrs_attachment = false; } diff --git a/src/amd/vulkan/radv_cmd_buffer.h b/src/amd/vulkan/radv_cmd_buffer.h index b166333bcbc..7df703b22d0 100644 --- a/src/amd/vulkan/radv_cmd_buffer.h +++ b/src/amd/vulkan/radv_cmd_buffer.h @@ -532,7 +532,7 @@ struct radv_cmd_state { unsigned last_cb_target_mask; - unsigned rast_prim; + unsigned vgt_outprim_type; uint32_t vtx_base_sgpr; uint8_t vtx_emit_num; diff --git a/src/amd/vulkan/radv_pipeline_graphics.c b/src/amd/vulkan/radv_pipeline_graphics.c index 02148c6fbc4..760316c316c 100644 --- a/src/amd/vulkan/radv_pipeline_graphics.c +++ b/src/amd/vulkan/radv_pipeline_graphics.c @@ -2563,28 +2563,28 @@ radv_pipeline_load_retained_shaders(const struct radv_device *device, const VkGr } static unsigned -radv_get_rasterization_prim(const struct radv_shader_stage *stages, const struct radv_graphics_state_key *gfx_state) +radv_get_vgt_outprim_type(const struct radv_shader_stage *stages, const struct radv_graphics_state_key *gfx_state) { - unsigned rast_prim; + unsigned vgt_outprim_type; if (gfx_state->unknown_rast_prim) return -1; if (stages[MESA_SHADER_GEOMETRY].nir) { - rast_prim = radv_conv_gl_prim_to_gs_out(stages[MESA_SHADER_GEOMETRY].nir->info.gs.output_primitive); + vgt_outprim_type = radv_conv_gl_prim_to_gs_out(stages[MESA_SHADER_GEOMETRY].nir->info.gs.output_primitive); } else if (stages[MESA_SHADER_TESS_EVAL].nir) { if (stages[MESA_SHADER_TESS_EVAL].nir->info.tess.point_mode) { - rast_prim = V_028A6C_POINTLIST; + vgt_outprim_type = V_028A6C_POINTLIST; } else { - rast_prim = radv_conv_tess_prim_to_gs_out(stages[MESA_SHADER_TESS_EVAL].nir->info.tess._primitive_mode); + vgt_outprim_type = radv_conv_tess_prim_to_gs_out(stages[MESA_SHADER_TESS_EVAL].nir->info.tess._primitive_mode); } } else if (stages[MESA_SHADER_MESH].nir) { - rast_prim = radv_conv_gl_prim_to_gs_out(stages[MESA_SHADER_MESH].nir->info.mesh.primitive_type); + vgt_outprim_type = radv_conv_gl_prim_to_gs_out(stages[MESA_SHADER_MESH].nir->info.mesh.primitive_type); } else { - rast_prim = radv_conv_prim_to_gs_out(gfx_state->ia.topology, false); + vgt_outprim_type = radv_conv_prim_to_gs_out(gfx_state->ia.topology, false); } - return rast_prim; + return vgt_outprim_type; } static bool @@ -2773,9 +2773,9 @@ radv_graphics_shaders_compile(struct radv_device *device, struct vk_pipeline_cac radv_graphics_shaders_link(device, gfx_state, stages); if (stages[MESA_SHADER_FRAGMENT].nir) { - unsigned rast_prim = radv_get_rasterization_prim(stages, gfx_state); + unsigned vgt_outprim_type = radv_get_vgt_outprim_type(stages, gfx_state); - NIR_PASS(_, stages[MESA_SHADER_FRAGMENT].nir, radv_nir_lower_fs_barycentric, gfx_state, rast_prim); + NIR_PASS(_, stages[MESA_SHADER_FRAGMENT].nir, radv_nir_lower_fs_barycentric, gfx_state, vgt_outprim_type); NIR_PASS(_, stages[MESA_SHADER_FRAGMENT].nir, nir_lower_fragcoord_wtrans); @@ -3523,7 +3523,7 @@ radv_graphics_pipeline_init(struct radv_graphics_pipeline *pipeline, struct radv return result; } - uint32_t vgt_gs_out_prim_type = radv_pipeline_init_vgt_gs_out(pipeline, &gfx_state.vk); + uint32_t vgt_outprim_type = radv_pipeline_init_vgt_gs_out(pipeline, &gfx_state.vk); radv_pipeline_init_multisample_state(device, pipeline, pCreateInfo, &gfx_state.vk); @@ -3539,7 +3539,7 @@ radv_graphics_pipeline_init(struct radv_graphics_pipeline *pipeline, struct radv pipeline->is_ngg = pipeline->base.shaders[pipeline->last_vgt_api_stage]->info.is_ngg; pipeline->has_ngg_culling = pipeline->base.shaders[pipeline->last_vgt_api_stage]->info.has_ngg_culling; pipeline->force_vrs_per_vertex = pipeline->base.shaders[pipeline->last_vgt_api_stage]->info.force_vrs_per_vertex; - pipeline->rast_prim = vgt_gs_out_prim_type; + pipeline->vgt_outprim_type = vgt_outprim_type; pipeline->uses_out_of_order_rast = gfx_state.vk.rs->rasterization_order_amd == VK_RASTERIZATION_ORDER_RELAXED_AMD; pipeline->uses_vrs = radv_is_vrs_enabled(&gfx_state.vk); pipeline->uses_vrs_attachment = radv_pipeline_uses_vrs_attachment(pipeline, &gfx_state.vk); diff --git a/src/amd/vulkan/radv_pipeline_graphics.h b/src/amd/vulkan/radv_pipeline_graphics.h index 9c9f06749f6..a26745e4dc6 100644 --- a/src/amd/vulkan/radv_pipeline_graphics.h +++ b/src/amd/vulkan/radv_pipeline_graphics.h @@ -125,7 +125,7 @@ struct radv_graphics_pipeline { /* Last pre-PS API stage */ mesa_shader_stage last_vgt_api_stage; - unsigned rast_prim; + unsigned vgt_outprim_type; /* Custom blend mode for internal operations. */ unsigned custom_blend_mode; @@ -291,21 +291,21 @@ radv_prim_is_points_or_lines(unsigned topology) } static inline bool -radv_rast_prim_is_point(unsigned rast_prim) +radv_vgt_outprim_is_point(unsigned vgt_outprim_type) { - return rast_prim == V_028A6C_POINTLIST; + return vgt_outprim_type == V_028A6C_POINTLIST; } static inline bool -radv_rast_prim_is_line(unsigned rast_prim) +radv_vgt_outprim_is_line(unsigned vgt_outprim_type) { - return rast_prim == V_028A6C_LINESTRIP; + return vgt_outprim_type == V_028A6C_LINESTRIP; } static inline bool -radv_rast_prim_is_points_or_lines(unsigned rast_prim) +radv_vgt_outprim_is_point_or_line(unsigned vgt_outprim_type) { - return radv_rast_prim_is_point(rast_prim) || radv_rast_prim_is_line(rast_prim); + return radv_vgt_outprim_is_point(vgt_outprim_type) || radv_vgt_outprim_is_line(vgt_outprim_type); } static inline bool