intel/isl: Fix HiZ+CCS comment about ambiguates

Note that CCS isn't ambiguated during a HiZ ambiguate. Dumping the CCS
surface after a HiZ ambiguate shows that the CCS is unchanged.

Fixes: 98dc7f56b7 ("intel/isl: Add a separate ISL_AUX_USAGE_HIZ_CCS_WT")
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9112>

src/intel/isl/isl.h

@@ -636,8 +636,8 @@ enum isl_aux_usage {
     *  and CCS is also enabled
     *
     * In this mode, the HiZ and CCS surfaces act as a single fused compression
-    * surface where resolves and ambiguates operate on both surfaces at the
-    * same time.  In this mode, the HiZ surface operates in write-through
+    * surface where resolves (but not ambiguates) operate on both surfaces at
+    * the same time.  In this mode, the HiZ surface operates in write-through
     * mode where it is only used for accelerating depth testing and not for
     * actual compression.  The CCS-compressed surface contains valid data at
     * all times.
@@ -649,8 +649,8 @@ enum isl_aux_usage {
    /** The auxiliary surface is a HiZ surface with and CCS is also enabled
     *
     * In this mode, the HiZ and CCS surfaces act as a single fused compression
-    * surface where resolves and ambiguates operate on both surfaces at the
-    * same time.  In this mode, full HiZ compression is enabled and the
+    * surface where resolves (but not ambiguates) operate on both surfaces at
+    * the same time.  In this mode, full HiZ compression is enabled and the
     * CCS-compressed main surface may not contain valid data.  The only way to
     * read the surface outside of the depth hardware is to do a full resolve
     * which resolves both HiZ and CCS so the surface is in the pass-through