radv: fix reporting instance/vertex_count for direct draws with RGP on GFX12

This is a cursed interaction with RGP...

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36188>

src/amd/vulkan/layers/radv_sqtt_layer.c

@@ -299,15 +299,44 @@ radv_describe_end_cmd_buffer(struct radv_cmd_buffer *cmd_buffer)
    radv_emit_sqtt_userdata(cmd_buffer, &marker, sizeof(marker) / 4);
 }
 
-void
-radv_describe_draw(struct radv_cmd_buffer *cmd_buffer)
+static void
+radv_gfx12_write_draw_marker(struct radv_cmd_buffer *cmd_buffer, const struct radv_draw_info *draw_info)
 {
-   struct radv_device *device = radv_cmd_buffer_device(cmd_buffer);
+   const struct radv_device *device = radv_cmd_buffer_device(cmd_buffer);
+   const struct radv_physical_device *pdev = radv_device_physical(device);
+   const enum amd_gfx_level gfx_level = pdev->info.gfx_level;
+   const enum amd_ip_type ring = radv_queue_family_to_ring(pdev, cmd_buffer->qf);
+   struct radeon_cmdbuf *cs = cmd_buffer->cs;
+
+   /* RGP doesn't need this marker for indirect draws. */
+   if (draw_info->indirect_va)
+      return;
+
+   const uint32_t dw0 = 0xf /* Used by RGP to identify this marker */ | (draw_info->instance_count << 4);
+   const uint32_t dw1 = draw_info->count;
+
+   /* This must be emitted with two separate SQ_THREAD_TRACE_USERDATA_7 packets, otherwise RGP
+    * doesn't recognize this draw marker.
+    */
+   radeon_begin(cs);
+   radeon_set_uconfig_perfctr_reg(gfx_level, ring, R_030D1C_SQ_THREAD_TRACE_USERDATA_7, dw0);
+   radeon_set_uconfig_perfctr_reg(gfx_level, ring, R_030D1C_SQ_THREAD_TRACE_USERDATA_7, dw1);
+   radeon_end();
+}
+
+void
+radv_describe_draw(struct radv_cmd_buffer *cmd_buffer, const struct radv_draw_info *draw_info)
+{
+   const struct radv_device *device = radv_cmd_buffer_device(cmd_buffer);
+   const struct radv_physical_device *pdev = radv_device_physical(device);
 
    if (likely(!device->sqtt.bo))
       return;
 
    radv_write_event_marker(cmd_buffer, cmd_buffer->state.current_event_type, UINT_MAX, UINT_MAX, UINT_MAX);
+
+   if (pdev->info.gfx_level >= GFX12)
+      radv_gfx12_write_draw_marker(cmd_buffer, draw_info);
 }
 
 void

src/amd/vulkan/radv_cmd_buffer.c

@@ -6121,44 +6121,6 @@ radv_upload_graphics_shader_descriptors(struct radv_cmd_buffer *cmd_buffer)
    radv_flush_force_vrs_state(cmd_buffer);
 }
 
-struct radv_draw_info {
-   /**
-    * Number of vertices.
-    */
-   uint32_t count;
-
-   /**
-    * First instance id.
-    */
-   uint32_t first_instance;
-
-   /**
-    * Number of instances.
-    */
-   uint32_t instance_count;
-
-   /**
-    * Whether it's an indexed draw.
-    */
-   bool indexed;
-
-   /**
-    * Indirect draw parameters.
-    */
-   uint64_t indirect_va;
-   uint32_t stride;
-
-   /**
-    * Draw count parameters VA.
-    */
-   uint64_t count_va;
-
-   /**
-    * Stream output parameters VA.
-    */
-   uint64_t strmout_va;
-};
-
 struct radv_prim_vertex_count {
    uint8_t min;
    uint8_t incr;
@@ -11661,7 +11623,7 @@ radv_before_draw(struct radv_cmd_buffer *cmd_buffer, const struct radv_draw_info
    }
 
    if (!dgc)
-      radv_describe_draw(cmd_buffer);
+      radv_describe_draw(cmd_buffer, info);
    if (likely(!info->indirect_va)) {
       struct radv_cmd_state *state = &cmd_buffer->state;
       struct radeon_cmdbuf *cs = cmd_buffer->cs;
@@ -11735,7 +11697,7 @@ radv_before_taskmesh_draw(struct radv_cmd_buffer *cmd_buffer, const struct radv_
    }
 
    if (!dgc)
-      radv_describe_draw(cmd_buffer);
+      radv_describe_draw(cmd_buffer, info);
    if (likely(!info->indirect_va)) {
       struct radv_cmd_state *state = &cmd_buffer->state;
       if (unlikely(state->last_num_instances != 1)) {

src/amd/vulkan/radv_cmd_buffer.h

@@ -765,6 +765,44 @@ struct radv_resolve_barrier {
 
 void radv_emit_resolve_barrier(struct radv_cmd_buffer *cmd_buffer, const struct radv_resolve_barrier *barrier);
 
+struct radv_draw_info {
+   /**
+    * Number of vertices.
+    */
+   uint32_t count;
+
+   /**
+    * First instance id.
+    */
+   uint32_t first_instance;
+
+   /**
+    * Number of instances.
+    */
+   uint32_t instance_count;
+
+   /**
+    * Whether it's an indexed draw.
+    */
+   bool indexed;
+
+   /**
+    * Indirect draw parameters.
+    */
+   uint64_t indirect_va;
+   uint32_t stride;
+
+   /**
+    * Draw count parameters VA.
+    */
+   uint64_t count_va;
+
+   /**
+    * Stream output parameters VA.
+    */
+   uint64_t strmout_va;
+};
+
 struct radv_dispatch_info {
    /**
     * Determine the layout of the grid (in block units) to be used.

src/amd/vulkan/radv_sqtt.h

@@ -15,6 +15,7 @@
 
 struct radv_cmd_buffer;
 struct radv_dispatch_info;
+struct radv_draw_info;
 struct radv_graphics_pipeline;
 
 struct radv_barrier_data {
@@ -98,7 +99,7 @@ void radv_describe_begin_cmd_buffer(struct radv_cmd_buffer *cmd_buffer);
 
 void radv_describe_end_cmd_buffer(struct radv_cmd_buffer *cmd_buffer);
 
-void radv_describe_draw(struct radv_cmd_buffer *cmd_buffer);
+void radv_describe_draw(struct radv_cmd_buffer *cmd_buffer, const struct radv_draw_info *draw_info);
 
 void radv_describe_dispatch(struct radv_cmd_buffer *cmd_buffer, const struct radv_dispatch_info *info);