asahi: Handle reloads of specific cube/mipfaces
The texture descriptor we construct for reloading needs to respect the
surface's texture/layer selection. Fix exactly the same bug as
b8c31ac06d ("lima: fix glCopyTexSubImage2D").
Fixes:
dEQP-GLES2.functional.texture.specification.basic_copytexsubimage2d.2d_rgb
dEQP-GLES2.functional.texture.specification.basic_copytexsubimage2d.2d_rgba
dEQP-GLES2.functional.texture.specification.basic_copytexsubimage2d.cube_rgb
dEQP-GLES2.functional.texture.specification.basic_copytexsubimage2d.cube_rgba
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>
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Marge Bot
parent
062ca49ca7
commit
11072cfd21
@@ -1224,24 +1224,32 @@ agx_build_reload_pipeline(struct agx_context *ctx, uint32_t code, struct pipe_su
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agx_pack(texture.cpu, TEXTURE, cfg) {
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struct agx_resource *rsrc = agx_resource(surf->texture);
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unsigned level = surf->u.tex.level;
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unsigned layer = surf->u.tex.first_layer;
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const struct util_format_description *desc =
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util_format_description(surf->format);
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/* To reduce shader variants, we always use a non-mipmapped 2D texture.
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* For reloads of arrays, cube maps, etc -- we only logically reload a
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* single 2D image. This does mean we need to be careful about
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* width/height and address.
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*/
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cfg.dimension = AGX_TEXTURE_DIMENSION_2D;
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cfg.layout = agx_translate_layout(rsrc->modifier);
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cfg.format = agx_pixel_format[surf->format].hw;
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cfg.swizzle_r = agx_channel_from_pipe(desc->swizzle[0]);
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cfg.swizzle_g = agx_channel_from_pipe(desc->swizzle[1]);
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cfg.swizzle_b = agx_channel_from_pipe(desc->swizzle[2]);
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cfg.swizzle_a = agx_channel_from_pipe(desc->swizzle[3]);
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cfg.width = surf->width;
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cfg.height = surf->height;
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cfg.width = u_minify(surf->width, level);
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cfg.height = u_minify(surf->height, level);
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cfg.levels = 1;
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cfg.srgb = (desc->colorspace == UTIL_FORMAT_COLORSPACE_SRGB);
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cfg.address = rsrc->bo->ptr.gpu;
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cfg.unk_2 = false;
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cfg.address = agx_map_texture_gpu(rsrc, level, layer);
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cfg.stride = (rsrc->modifier == DRM_FORMAT_MOD_LINEAR) ?
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(rsrc->slices[0].line_stride - 16) :
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(rsrc->slices[level].line_stride - 16) :
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AGX_RT_STRIDE_TILED;
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}
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