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freedreno/devices: Update chicken bits

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b22 should be set on all a7xx.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37411>
This commit is contained in:
Rob Clark
2025-09-16 07:38:40 -07:00
committed by Marge Bot
parent a8ff0176de
commit 0a1f56fb90
1 changed files with 5 additions and 5 deletions
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src/freedreno/common/freedreno_devices.py
+5 -5
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@@ -995,7 +995,7 @@ a730_raw_magic_regs = [
[A6XXRegs.REG_A6XX_UCHE_CACHE_WAYS, 0x00840004],
[A6XXRegs.REG_A6XX_TPL1_DBG_ECO_CNTL1, 0x00040724],
[A6XXRegs.REG_A7XX_SP_CHICKEN_BITS_1, 0x00002400],
[A6XXRegs.REG_A7XX_SP_CHICKEN_BITS_1, 0x00402400],
[A6XXRegs.REG_A7XX_SP_CHICKEN_BITS_2, 0x00000000],
[A6XXRegs.REG_A7XX_SP_CHICKEN_BITS_3, 0x00000000],
[A6XXRegs.REG_A7XX_UCHE_UNKNOWN_0E10, 0x00000000],
@@ -1050,7 +1050,7 @@ a740_raw_magic_regs = [
[A6XXRegs.REG_A6XX_UCHE_CACHE_WAYS, 0x00040004],
[A6XXRegs.REG_A6XX_TPL1_DBG_ECO_CNTL1, 0x00040724],
[A6XXRegs.REG_A7XX_SP_CHICKEN_BITS_1, 0x00000400],
[A6XXRegs.REG_A7XX_SP_CHICKEN_BITS_1, 0x00400400],
[A6XXRegs.REG_A7XX_SP_CHICKEN_BITS_2, 0x00430800],
[A6XXRegs.REG_A7XX_SP_CHICKEN_BITS_3, 0x00000000],
[A6XXRegs.REG_A7XX_UCHE_UNKNOWN_0E10, 0x00000000],
@@ -1151,7 +1151,7 @@ add_gpus([
[A6XXRegs.REG_A6XX_UCHE_CACHE_WAYS, 0x00000000],
[A6XXRegs.REG_A6XX_TPL1_DBG_ECO_CNTL1, 0x00040724],
[A6XXRegs.REG_A7XX_SP_CHICKEN_BITS_1, 0x00000400],
[A6XXRegs.REG_A7XX_SP_CHICKEN_BITS_1, 0x00400400],
[A6XXRegs.REG_A7XX_SP_CHICKEN_BITS_2, 0x00430800],
[A6XXRegs.REG_A7XX_SP_CHICKEN_BITS_3, 0x00000000],
[A6XXRegs.REG_A7XX_UCHE_UNKNOWN_0E10, 0x00000000],
@@ -1223,7 +1223,7 @@ add_gpus([
[A6XXRegs.REG_A6XX_UCHE_CACHE_WAYS, 0x00040004],
[A6XXRegs.REG_A6XX_TPL1_DBG_ECO_CNTL1, 0x00000700],
[A6XXRegs.REG_A7XX_SP_CHICKEN_BITS_1, 0x00000400],
[A6XXRegs.REG_A7XX_SP_CHICKEN_BITS_1, 0x00400400],
[A6XXRegs.REG_A7XX_SP_CHICKEN_BITS_2, 0x00430820],
[A6XXRegs.REG_A7XX_SP_CHICKEN_BITS_3, 0x00000000],
[A6XXRegs.REG_A7XX_UCHE_UNKNOWN_0E10, 0x00000000],
@@ -1322,7 +1322,7 @@ add_gpus([
[A6XXRegs.REG_A6XX_UCHE_CACHE_WAYS, 0x00000000],
[A6XXRegs.REG_A7XX_UCHE_UNKNOWN_0E10, 0x00000000],
[A6XXRegs.REG_A7XX_UCHE_UNKNOWN_0E11, 0x00000080],
[A6XXRegs.REG_A7XX_SP_CHICKEN_BITS_1, 0x00000000],
[A6XXRegs.REG_A7XX_SP_CHICKEN_BITS_1, 0x00400000],
[A6XXRegs.REG_A7XX_SP_CHICKEN_BITS_2, 0x00431800],
[A6XXRegs.REG_A7XX_SP_CHICKEN_BITS_3, 0x00800000],
[A6XXRegs.REG_A7XX_SP_HLSQ_DBG_ECO_CNTL, 0x00000000],