Files
mesa/src/intel/compiler
Ian Romanick feec9166cd intel/compiler/xe2: Handle new URB write messages
Rework:
 * idr v1: Fix compilation error.
 * idr v2: Add support for per-channel offsets.
 * idr v3: get_lowered_simd_width is 16 on Xe2+.
 * idr v4: Add disassembly support.  Add validation support.
 * Sqaushed in changes Marcin Ślusarz's patches:
   * "intel/compiler: skip adding 0 to payload address"
   * "intel/compiler/xe2: drop masking off top 8 bits of URB handle"

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25195>
2023-09-27 23:57:25 +00:00
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2023-08-14 21:22:53 +00:00
2023-08-14 21:22:53 +00:00
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