Iago Toral Quiroga fb7cb853c9 i965/vec4: add a scalarization pass for double-precision instructions
The hardware only supports 32-bit swizzles, which means that we can
only access directly channels XY of a DF making access to channels ZW
more difficult, specially considering the various regioning restrictions
imposed by the hardware. The combination of both things makes handling
ramdom swizzles on DF operands rather difficult, as there are many
combinations that can't be represented at all, at least not without
some work and some level of instruction splitting depending on the case.

Writemasks are 64-bit in general, however XY and ZW writemasks also work
in 32-bit, which means these writemasks can't be represented natively,
adding to the complexity.

For now, we decided to try and simplify things as much as possible to
avoid dealing with all this from the get go by adding a scalarization
pass that runs after the main optimization loop. By fully scalarizing
DF instructions in align16 we avoid most of the complexity introduced
by the aforementioned hardware restrictions and we have an easier path
to an initial fully functional version for the vector backend in Haswell
and IvyBridge.

Later, we can improve the implementation so we don't necessarily
scalarize everything, iteratively adding more complexity and building
on top of a framework that is already working. Curro drafted some ideas
for how this could be done here:
https://bugs.freedesktop.org/show_bug.cgi?id=92760#c82

v2:
  - Use a copy constructor for the scalar instructions so we copy all
    relevant instructions fields from the original instruction.

v3: Fix indention in one switch (Matt)

Reviewed-by: Matt Turner <mattst88@gmail.com>
2017-01-03 11:26:51 +01:00
2016-08-31 17:06:54 -07:00
2016-08-30 16:44:00 -04:00
2016-08-31 17:06:54 -07:00
2016-08-25 13:55:52 -07:00
2016-05-25 12:23:12 -06:00

File: docs/README.WIN32

Last updated: 21 June 2013


Quick Start
----- -----

Windows drivers are build with SCons.  Makefiles or Visual Studio projects are
no longer shipped or supported.

Run

  scons libgl-gdi

to build gallium based GDI driver.

This will work both with MSVS or Mingw.


Windows Drivers
------- -------

At this time, only the gallium GDI driver is known to work.

Source code also exists in the tree for other drivers in
src/mesa/drivers/windows, but the status of this code is unknown.

Recipe
------

Building on windows requires several open-source packages. These are
steps that work as of this writing.

- install python 2.7
- install scons (latest)
- install mingw, flex, and bison
- install pywin32 from here: http://www.lfd.uci.edu/~gohlke/pythonlibs
  get pywin32-218.4.win-amd64-py2.7.exe
- install git
- download mesa from git
  see http://www.mesa3d.org/repository.html
- run scons

General
-------

After building, you can copy the above DLL files to a place in your
PATH such as $SystemRoot/SYSTEM32.  If you don't like putting things
in a system directory, place them in the same directory as the
executable(s).  Be careful about accidentially overwriting files of
the same name in the SYSTEM32 directory.

The DLL files are built so that the external entry points use the
stdcall calling convention.

Static LIB files are not built.  The LIB files that are built with are
the linker import files associated with the DLL files.

The si-glu sources are used to build the GLU libs.  This was done
mainly to get the better tessellator code.

If you have a Windows-related build problem or question, please post
to the mesa-dev or mesa-users list.
S
Description
No description provided
Readme 538 MiB
Languages
C 75.5%
C++ 17.2%
Python 2.7%
Rust 1.8%
Assembly 1.5%
Other 1%