Eric Anholt f301eec9a3 nir-to-tgsi: Fix handling of partial writemasks on SSA/REG decls.
In nouveau's PBO path with GS support and no VS layer export, we got:

        intrinsic store_output (ssa_1, ssa_0) (0, 15, 0, 160, 128) /* base=0 */ /* wrmask=xyzw */ /* component=0 */ /* src_type=float32 */ /* location=0 slots=1 */     /* out_pos */
        [...]
        vec3 32 ssa_4 = mov ssa_3.xxx
        intrinsic store_output (ssa_4, ssa_0) (0, 4, 0, 160, 128) /* base=0 */ /* wrmask=z */ /* component=0 */ /* src_type=float32 */ /* location=0 slots=1 *//* out_pos */

The mov's SSA value we would decide we could store directly to the output,
since nothing else used it.  However, the store has a writemask, and the
ALU op was stomping over it instead of ANDing with the output decl's
existing writemask.

Fixes: f79f382c81 ("nir_to_tgsi: Store directly to TGSI outputs when possible.")
Closes: #4380
Tested-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9376>
2021-03-08 19:01:40 +00:00
2020-08-06 09:46:48 +00:00
2020-01-18 11:39:32 +01:00
2020-08-06 09:46:48 +00:00
2019-10-18 16:42:40 +00:00
2021-01-13 09:46:19 -08:00

`Mesa <https://mesa3d.org>`_ - The 3D Graphics Library
======================================================


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------

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---------------

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