Lionel Landwerlin ea2bbe3271 anv: use stage mask to deduce cs/pb-stall requirements
When flushing the render target cache for future operations, we need a
stall at pixel scoreboard. We likely didn't see any issue until now
because a change in render target added the pb-stall.

When using a 2 compute shaders with the following pattern :
  vkCmdDispatch()
  vkCmdPipelineBarrier() ImageBarrier with (src|dst)AccessMask=0 & identical layout
  vkCmdDispatch()

we should ensure that the first dispatch is completed before executing
the second one, otherwise they can race to on resource accesses. This
fixes failures in some new CTS tests.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31676>
2024-10-17 11:55:33 +00:00
2024-10-16 11:38:48 +03:00
2024-10-14 19:43:35 +00:00

`Mesa <https://mesa3d.org>`_ - The 3D Graphics Library
======================================================


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