Eric Anholt
d5a3971457
We carve out half the SSBO space for atomics, and we were just binding them way up there. freedreno was then using a remapping table to map the sparse buffer index back down, since space in the descriptor array is a shared resource that may limit parallelism. That remapping table generated inside of the ir3 compiler is getting thoroughly in the way of implementing vulkan descriptor sets. We will be able to get rid of the freedreno's remapping table, and hopefully save shared resources on other hardware, by packing the atomics tightly above the SSBOs (like i965 does). We already rebind the shader buffers on program change if either the old or new program has SSBOs or ABOs, so this doesn't necessarily increase the program state change cost (the only cost increase I can come up with is if you're using the same atomic counter without rebinding it across changes of programs with varying SSBO counts, meaning it would now bounce around index space). Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3240>
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