Rhys Perry c7fa15b381 aco: improve clrx disassembly ...

- remove uninteresting lines of output
- remove binary offset before instructions, for easier diffing
- replace generated labels with block numbers
- add encoded instructions at the end of lines, like LLVM dissaembly
- print constant data instead of trying to disassemble it

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14042>

2021-12-10 23:46:30 +00:00

..

addrlib

amd/addrlib: Use get_supported_arguments to get compiler args.

2021-11-24 07:03:54 +00:00

ci

ac: change family names to uppercase in ac_get_family_name()

2021-11-23 08:07:41 +00:00

common

treewide: drop mtypes/macros includes from main

2021-12-08 22:14:45 +00:00

compiler

aco: improve clrx disassembly

2021-12-10 23:46:30 +00:00

llvm

nir: Rename nir_get_io_vertex_index_src and include per-primitive I/O.

2021-11-16 07:46:55 +00:00

registers

python: drop python2 support

2021-08-14 21:44:32 +00:00

vulkan

radv: do not perform depth/stencil resolves for suspended render pass

2021-12-10 22:03:00 +00:00

.clang-format

radv: Add clang-format for AMD code.

2021-04-10 03:31:32 +02:00

meson.build

radv: Allow building when LLVM isn’t enabled

2021-10-01 10:40:18 +02:00