Daniel Schürmann 98136bda05 aco: fix self-intersecting register swaps ...

Splitting self-intersecting register swaps into
3 sections was unnecessary and only worked because
the middle section was always empty for full dword
swaps.

No fossil-db changes.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11823>

2021-07-13 09:14:43 +02:00

..

addrlib

amd/addrlib: remove Meson debug message()

2021-06-22 23:47:19 +00:00

ci

ci: remove few CTS that are now skipped with RADV

2021-07-05 12:07:45 +02:00

common

ac,radv: implement the cs_regalloc_hang HW bug workaround

2021-07-09 13:37:37 +00:00

compiler

aco: fix self-intersecting register swaps

2021-07-13 09:14:43 +02:00

llvm

ac/llvm: rework how negative W affects culling to not call accept_func twice

2021-07-08 18:37:41 +00:00

registers

amd/registers: regenerate json files without 32-bit register fields

2021-05-25 16:15:44 +00:00

vulkan

radv: lower primitive shading rate in NIR

2021-07-12 17:54:07 +00:00

.clang-format

radv: Add clang-format for AMD code.

2021-04-10 03:31:32 +02:00

meson.build

aco: add framework for unit testing

2020-07-30 16:13:08 +00:00