Jason Ekstrand
5dfd83d7a1
Because we set the needs_data_cache bit from the NIR during compilation, any time a shader was pulled out of the pipeline cache, we wouldn't set the bit and the data cache was disabled. Fortunately, on Gen8+, this bit is ignored because we always use the ALL section in the L3$ config instead of separate DC and RO sections. On Gen7, however, this meant that we were basically never running with the data cache enabled and our compute performance was suffering massively because of it. This commit improves Geekbench 5 scores on my Haswell GT3 by roughly 330% (no, that's not a typo). Cc: mesa-stable@lists.freedesktop.org Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3912> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3912>
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