3fcdd9e4a7a63a9a6a1f72c2c459e02acba7f578
This is heavily copy-pasted from a patch of Ian Romanick, including the commit message. Previously, this pass always generated fcsel for bcsel. This was the only place that generate fcsel, so various drivers assumed (and needed!) that src0 was a Boolean with 0.0 or 1.0 as the only values. Specifically, many DX9 / GL_ARB_vertex_program platforms lack a CMP instruction in vertex shaders. In those cases, they would use LRP to implement fcsel. The bummer is that many plaforms have a real fcsel instruction, and those platforms would benefit from other places generating that opcode. Instead of leaving assumptions in drivers about the sources of an opcode that they can't really support, allow them to control the way the lowering pass translates bcsel. Two flags are used to control this: - If the driver sets has_fused_comp_and_csel in nir_options, fcsel_gt will be used. Since the Boolean value is 0.0 or 1.0, this is equivalent to fcsel. - If the parameter has_fcsel_ne is set, fcsel will be used. This is the old path. - Otherwise, the lowering pass assumes we're on a crufty, old DX9 vertex program, and it emits flrp. With this, the assumptions about src0 of fcsel in NTT can be removed. If a platform can't handle fcsel, it should ensure that the lowering pass won't generate it. No change in shader-db. Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com> Reviewed-by: Emma Anholt <emma@anholt.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20162>
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