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37e325fe15b3e5f42bcc7e9a5f904ce54e90e9df
mesa/src/amd
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Vitaliy Triang3l Kuzmin 37e325fe15 radv: Enable the null export workaround with POPS
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22250>
2023-06-26 15:58:04 +00:00
..
addrlib
amd/addrlib: add ADDR_FMT_BG_RG_16_16_16_16
2023-06-01 17:59:39 +00:00
ci
Revert "amd/ci: temporarily disable some manual jobs that take a long time to run"
2023-06-22 12:42:08 +00:00
common
ac: Define POPS collision wave ID argument SGPR
2023-06-26 15:58:03 +00:00
compiler
aco: Implement fragment shader interlock intrinsics
2023-06-26 15:58:04 +00:00
drm-shim
amd/drm-shim: use fixed-width types
2023-06-23 18:35:52 +00:00
llvm
compiler: Move from nir_scope to mesa_scope
2023-06-19 23:29:26 +00:00
registers
ac,radeonsi,winsyses: switch to SPDX-License-Identifier: MIT
2023-05-24 21:48:19 +00:00
vulkan
radv: Enable the null export workaround with POPS
2023-06-26 15:58:04 +00:00
meson.build
meson: build radeonsi with aco
2023-05-15 02:01:10 +00:00
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