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161445 Commits

Author SHA1 Message Date
Alyssa Rosenzweig f716da596b asahi,agx: Set coherency bit for clustered targets 
We need to set a particular bit on atomics for them to be coherent across
clusters. Fixes atomics on G13X.

Setting this bit on the single-cluster G13G, on the other hand, wedges the GPU.
So best be careful ;-)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24258>
 2023-07-20 15:33:27 +00:00
Janne Grunau f66fc18886 asahi: toggle more barrier bits after transform feedback 
Fixes KHR-GLES31.core.draw_indirect.advanced-twoPass-transformFeedback-arrays
and KHR-GLES31.core.draw_indirect.advanced-twoPass-transformFeedback-elements
on M1 Ultra (G13D). Let's assume that same bits are required on M1 Pro
and Max.

Signed-off-by: Janne Grunau <j@jannau.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24258>
 2023-07-20 15:33:27 +00:00
Alyssa Rosenzweig 58d43ca03c asahi: Identify background/EOT counts 
Similar to the counts for VDM/PDM/CDM.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24258>
 2023-07-20 15:33:27 +00:00
Alyssa Rosenzweig 198c51d664 asahi: Serialize NIR in memory 
Deserializing isn't expected to be much more expensive than cloning, and the
serialized NIR is *significantly* smaller. So store the serialized instead of
the deserialized, and deserialize on the fly.

This reduces a lot of noise in valgrind due to random crap alloc'd against the
NIR shader by lowering passes that now get properly freed.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24258>
 2023-07-20 15:33:27 +00:00
Alyssa Rosenzweig 8df0a86cc0 asahi: Extract shader_initialize helper 
To fill out an agx_uncompiled_shader struct, since the logic was duplicated
between graphics and compute.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24258>
 2023-07-20 15:33:27 +00:00
Asahi Lina 0e08923a7b asahi: Add nomsaa debug flag 
This forces off MSAA, which together with smalltile mode helps test more
combinations.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24258>
 2023-07-20 15:33:27 +00:00
Asahi Lina e9b2f02c2f asahi: Add smalltile debug option 
This lets us force small tiles when they otherwise would not be
necessary, which is useful for decoupling tile size and the logic that
depends on it from things like MSAA and MRT which can trigger small
tiles.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24258>
 2023-07-20 15:33:27 +00:00
Asahi Lina 35715db30d asahi: Add synctvb debug flag 
This requests synchronous TVB growth (instead of split renders). Mostly
for testing at this point.

Only works with newer kernels and the kernel will complain on dmesg for
now.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24258>
 2023-07-20 15:33:27 +00:00
Alyssa Rosenzweig d33375bb05 asahi: Refactor PBE upload routine 
In general, PBE descriptors map pipe_image_views for the hardware. That we use a
writeable shader image internally for render targets is an implementation-detail
of the end-of-tile program. So, refactor the PBE upload routine to take a
pipe_image_view (not a pipe_surface), and translate the pipe_surface into an
internal pipe_image_view for end-of-tile programs.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24258>
 2023-07-20 15:33:27 +00:00
Alyssa Rosenzweig 85c829d64f asahi: Remove unused #define 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24258>
 2023-07-20 15:33:27 +00:00
Alyssa Rosenzweig f10d51541d asahi: Use nir_builder_at more 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24258>
 2023-07-20 15:33:27 +00:00
Alyssa Rosenzweig c20c9f06d3 asahi: Augment fake drm_asahi_params_global 
Stub out a bit more UAPI so we can build with the additions in this patch
series.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24258>
 2023-07-20 15:33:27 +00:00
Pavel Ondračka c9a0e91d4c r300: fix cycles calculation 
There might be more texture semaphores per begin tex block, just do the
cycles calculation on the first one.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24250>
 2023-07-20 10:19:24 +00:00
Lionel Landwerlin 2007d67054 ci/a530: switch a few tests to flakes to unblock CI 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24248>
 2023-07-20 09:46:21 +00:00
Felix DeGrood d04be9770b intel/compiler: use shader source hash in shader dump code 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23942>
 2023-07-20 09:08:08 +00:00
Felix DeGrood 6ac8a9a030 intel: use shader source hash in INTEL_MEASURE 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23942>
 2023-07-20 09:08:08 +00:00
Felix DeGrood 49182271e3 mesa: propagate shader source sha1 from gl_shader to nir_shader 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23942>
 2023-07-20 09:08:08 +00:00
Felix DeGrood 96f344e5a6 iris: save shader source sha1 in ish 
Save lowest dword of shader source sha1 in pipeline object for use
later as hash for uniquely identifying shader in debug outputs.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23942>
 2023-07-20 09:08:08 +00:00
Felix DeGrood 124973c635 anv: Add Source hash field to VkPipelineExecutableStatisticKHR 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23942>
 2023-07-20 09:08:08 +00:00
Felix DeGrood b145d05381 anv: save a shader source uint32_t hash in gfx/compute pipelines 
Save lowest dword of shader source sha1 in pipeline object for use
later as hash for uniquely identifying shader in debug outputs.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23942>
 2023-07-20 09:08:08 +00:00
Lionel Landwerlin 3384f029be intel/compiler: rework input parameters 
Use a struct for various common parameters rather than per stage
structure or arguments to stage specific entrypoints.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23942>
 2023-07-20 09:08:08 +00:00
Konstantin Seurer df3f2c89f5 radv/meta_buffer: Rename size_minus16 to max_offset 
It's just better.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24213>
 2023-07-20 07:43:16 +00:00
Konstantin Seurer c49bd75fa7 radv/meta_buffer: Stop setting RADV_META_SAVE_DESCRIPTORS 
Everything is done via push constants.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24213>
 2023-07-20 07:43:16 +00:00
Konstantin Seurer 839d6f9fa2 radv: Stop using the misleading round_up_u* functions 
The functions had the same behavior as DIV_ROUND_UP but their names do
not mention a division.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24210>
 2023-07-20 06:51:30 +00:00
Pavel Ondračka 34a12a2727 r300: cycles estimate for shader-db 
To account for:
- macro MAD in vs
- NOPs needed before presubtract
- texture scheduling and a proper texture semaphore usage

The docs don't mention any other references to extra cycles, so otherwise
we assume 1 instruction = 1 cycle.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7573
Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24152>
 2023-07-20 06:37:10 +00:00
Pavel Ondračka 219dc0fc08 r300: add a helper for checking number of temporary sources 
Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24152>
 2023-07-20 06:37:10 +00:00
Pavel Ondračka c86e1b97a3 r300: normal instruction can't have presubtract op 
Only fs have presubtract ops and by the time we gather the stats,
all normal instructions were converted to pair ones.

Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24152>
 2023-07-20 06:37:10 +00:00
Pavel Ondračka c577655f8c r300: bump the RC_MAX_INDEX_BITS 
We skip ntt regalloc for vertex shaders and we have 1024 instruction
limit for R500 vs, so in theory we could run some shaders with more that
1024 ssa registers (if we can optimize the number of instruction in the
backend). So add one more bit.

Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24154>
 2023-07-20 06:22:03 +00:00
Pavel Ondračka beee5c3658 r300: source register index is always unsigned 
This was forgotten when we converted to the NIR lowering of negative
indirect adressing.

Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24154>
 2023-07-20 06:22:03 +00:00
Pavel Ondračka 953dd9605f r300: check for index overflow when translating from TGSI 
Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24154>
 2023-07-20 06:22:03 +00:00
David Heidelberg 3b5daba32d ci/panfrost: introduce OpenGL testing with Mali-G57 MP5 on Asurada chromebook 
Copy-paste *-skips,fails,flakes from g52.

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24198>
 2023-07-20 01:25:34 +00:00
Alyssa Rosenzweig ac51cc12b1 panfrost: Fix transform feedback on v9 harder 
We might need more push uniforms (FAU) than the currently bound program. Update
that too for correct results on v9.

Fixes: c282f80c98 ("panfrost: Fix transform feedback on v9")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24198>
 2023-07-20 01:25:34 +00:00
Alyssa Rosenzweig 64ff2b3ed6 panfrost: Lower vertex_id for XFB 
Even on Valhall, vertex_id is zero-based in a transform feedback program. Lower
that for transform feedback programs properly since it wouldn't happen
automatically on Valhall. Fixes assertion fails.

Fixes: 91ffd10351 ("pan/bi: Lower gl_VertexID in NIR")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24198>
 2023-07-20 01:25:34 +00:00
Chia-I Wu 539bf3929b amd/ci: update radv-stoney-aco-fails.txt for depth/stencil clear 
This MR fixes the
stencil_d32_sfloat_s8_uint_load_op_none_store_op_none_write_off one.
The rest appears to be outdated.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22114>
 2023-07-19 23:46:02 +00:00
Chia-I Wu e0602775c1 radv: fix separate depth/stencil layouts in clear meta 
Depth and stencil can be in different layouts.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22114>
 2023-07-19 23:46:02 +00:00
Chia-I Wu aaec5ea293 radv: refactor depth clear in clear meta 
Modify what we pass to radv_fast_clear_depth and emit_depthstencil_clear
in preparation for separate depth/stencil layouts.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22114>
 2023-07-19 23:46:02 +00:00
Chia-I Wu a06cb572f6 radv: fix separate depth/stencil layouts in resolve meta 
Depth and stencil can be in different layouts.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22114>
 2023-07-19 23:46:02 +00:00
Chia-I Wu 673d416e22 radv: fix separate depth/stencil layouts in fb state 
Set S_028000_DEPTH_COMPRESS_DISABLE/S_028000_STENCIL_COMPRESS_DISABLE
depending on the depth/stencil layouts respectively.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22114>
 2023-07-19 23:46:02 +00:00
Dave Airlie 460e62b5e7 ci: remove binding model from the asan skips for lavapipe. 
These should be fine now.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20661>
 2023-07-19 23:28:31 +00:00
José Roberto de Souza 6f88e3befb anv: Add support for userptr in Xe KMD 
Xe KMD only requires userptr to be bound to VM, so here reusing
workaround_bo->gem_handle id to all userptr bos in Xe version of
gem_create_userptr(). The Xe version of gem_close() will make sure
that workaround_bo->gem_handle is not closed when userptr bos
are closed.

With the same gem_handle for all userptr bos, it was also necessary
skip the anv_device_lookup_bo() and manually allocate memory to store
anv_bo in host heap memory, what lead to some small changes in
anv_device_release_bo() as well.

The remaining changes are the support to VM bind userptr bos and the
gem_vm_bind() call in anv_device_import_bo_from_host_ptr().

Fixes: dEQP-VK.memory.external_memory_host*
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23787>
 2023-07-19 22:20:24 +00:00
José Roberto de Souza 5c729cb1b8 anv: Replace handle by anv_bo in the gem_close() 
struct anv_bo will be needed in the next patch to properly handle
closure of userptr bos.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23787>
 2023-07-19 22:20:24 +00:00
José Roberto de Souza 7e7ab39424 anv: Add gem_create_userptr() to KMD backend 
Xe support of userptr will be implemented in the next patch,
this is just moving the i915 and stub functions to KMD backend.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23787>
 2023-07-19 22:20:24 +00:00
Lionel Landwerlin 46958bcb74 intel/fs: fix missing predicate on SEL instruction 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: d8dfd153c5 ("intel/fs: Make per-sample and coarse dispatch tri-state")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9381
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24236>
 2023-07-19 21:57:25 +00:00
Mike Blumenkrantz 7fe1657140 zink: set feedback attachments on batch init 
just to be safe

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23766>
 2023-07-19 20:57:53 +00:00
Mike Blumenkrantz 7cbdb0b714 zink: set pipeline dynamic state count after all dynamic states are set 
Fixes: d17c081b7c ("zink: use dynamic state for feedback loops when available")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23766>
 2023-07-19 20:57:53 +00:00
Caio Oliveira 97c79cdf19 nir: Use instructions_pass() for nir_fixup_deref_modes() 
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24220>
 2023-07-19 20:15:12 +00:00
Danylo Piliaiev a0d426370d ir3: Fix FS quad ops returning wrong values from helper invocations 
Without SP_FS_CTRL_REG0.LODPIXMASK quad ops don't get values from
helper invocations, but from the current one.

Fixes:
 dEQP-VK.glsl.derivate.dfdxsubgroup.*
 dEQP-VK.glsl.derivate.dfdysubgroup.*

Cc: mesa-stable

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24211>
 2023-07-19 19:41:51 +00:00
Danylo Piliaiev 696f37f5c3 freedreno/regs: Rename SP_FS_CTRL_REG0.DIFF_FINE into LODPIXMASK 
That's the "real" name of the field.

It enables ALL helper invocations in a quad, which is necessary for
fine derivatives and quad subgroup ops.

While PIXLODENABLE by itself enables only 3 out 4 fragments in a quad.

Cc: mesa-stable

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24211>
 2023-07-19 19:41:51 +00:00
Gert Wollny 59087003c4 r600/sfn: remove debug output leftovers 
Fixes: ae7d904a73
    r600/sfn: Implement source mod optimization in backend

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24239>
 2023-07-19 19:12:31 +00:00
David Rosca 7a4e3b2788 radeonsi/vcn: Fix setting color range in AV1 bitstream 
As per spec color_range and chroma_sample_position parameters
are always set, not conditional on color_description_present_flag.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24179>
 2023-07-19 18:51:48 +00:00