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159716 Commits

Author SHA1 Message Date
Lucas Stach
f33a4fa602 etnaviv: query: remove incorrect comment 
The allocated query buffer is always 4KB in size and can hold
a variable number of samples depending on the sample size.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23557>
 2023-06-11 18:41:32 +00:00
Lucas Stach
b6a4b988ab etnaviv: query: reset sample count on begin_query 
ARB_occlusion_query specifies that the query is reset on BeginQueryARB,
not when the fetching the result of the query. This behavior also makes
a lot of sense for the perfmon queries.

CC: mesa-stable
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23557>
 2023-06-11 18:41:31 +00:00
Lucas Stach
22d5d1bc40 etnaviv: query: move sample counter manipulation into query providers 
Different query providers have different behavior on when they produce
samples: the perfmon provider provides a sample at the start and at the
end of the query, while the occlusion query provider only adds another
sample when the query is complete.

Move the sample count manipulation to the providers to be able to take
those differences into account. Removes a useless always-zero sample
for each OQ resume/suspend pair.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23557>
 2023-06-11 18:41:31 +00:00
Timur Kristóf
4452216a28 radv: Use RESET_FILTER_CAM for some mesh shading draws. 
It's unclear why this is needed, but PAL uses RESET_FILTER_CAM
for some mesh shading draw packets:
- DISPATCH_MESH_INDIRECT_MULTI
- DISPATCH_TASKMESH_GFX

Let's do the same in radv.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23554>
 2023-06-11 13:22:59 +00:00
Friedrich Vock
4181e144ef radv: Always flush before writing acceleration structure properties 
Equivalent of 284e604872 but for acceleration structure queries.
If an app inserts a barrier between AS builds and writing AS properties,
we must respect it or things will blow up.

Cc: mesa-stable
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23568>
 2023-06-11 08:52:03 +00:00
Karol Herbst
31fb75a08b ac/llvm: set +cumode for radeonsi 
radeonsi switched over to CU wavefront execution mode, but didn't tell
LLVM. This can lead to shaders requiring too many VGPRs to be executed in
CU mode and so cause GPU resets.

Pass along +cumode to LLVM so it properly spills VGPRs.

Fixes: 9d7eab2ab1 ("radeonsi: don't enable WGP_MODE because of high cost of workgroup mem coherency")
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23569>
 2023-06-11 08:25:45 +00:00
Yonggang Luo
19196199a8 ac: Replace the usage of pipe_compare_func with compare_func 
PIPE_FUNC_ -> COMPARE_FUNC_
pipe_compare_func -> compare_func

Now include "pipe/p_state.h" is not needed and remove it in ac_nir.h

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23422>
 2023-06-11 06:27:05 +00:00
Sviatoslav Peleshko
08e95f8f8e nir/lower_shader_calls: Fix cursor if broken after nir_cf_extract() call 
Fixes: e2dadda3 ("Revert "nir/lower_shader_calls: put inserted instructions into a dummy block")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8978
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22884>
 2023-06-11 00:29:49 +00:00
Konrad Dybcio
ba0787f266 freedreno: Partially decode CP_PROTECT_CNTL 
Give bogus but meaningful names to the bitfields that we understand.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23467>
 2023-06-11 00:13:09 +00:00
Yonggang Luo
1555f41256 panfrost: Replace the usage of PIPE_BIND_* with PAN_BIND_* 
PIPE_BIND_* belongs to gallium, do not use it in panvk

As pan_format.h also used ban panfrost gallium driver, so static_assert it equal

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23526>
 2023-06-10 14:54:11 +00:00
Konstantin Seurer
51cd2965c7 aco/rt: Do not initialize the next shader addr 
The uniform one is already set and the raygen shader isn't guarded
anymore.

Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23545>
 2023-06-10 10:00:27 +00:00
Konstantin Seurer
4bf3d7d8cf radv/rt: Clear NIR metadata after lowering the ABI 
radv_nir_lower_rt_abi inserts instructions and control flow.

Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23545>
 2023-06-10 10:00:27 +00:00
Konstantin Seurer
b577f8b547 radv/rt: Do not guard the raygen shader 
The condition will always evaluate to true because it's set this way by
the prolog.

Quake II RTX:

Totals from 7 (10.00% of 70) affected shaders:
Instrs: 30070 -> 30056 (-0.05%); split: -0.07%, +0.03%
CodeSize: 163476 -> 163420 (-0.03%); split: -0.06%, +0.03%
Latency: 80335 -> 83887 (+4.42%)
InvThroughput: 16870 -> 17603 (+4.34%)
Copies: 3191 -> 3215 (+0.75%)
Branches: 1273 -> 1266 (-0.55%)
PreSGPRs: 356 -> 354 (-0.56%)

Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23545>
 2023-06-10 10:00:27 +00:00
Karol Herbst
ed3f23029b ac/llvm: replace MESA_SHADER_COMPUTE checks with gl_shader_stage_is_compute 
This will be required for OpenCL subgroup support on radeonsi, but also
fixes some regressions today as radeonsi started to use the subgroup id
for invocation_index calculation.

Fixes: 39da12b7c7 ("ac/llvm: clean up visit_load_local_invocation_index and visit_load_subgroup_id")
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23551>
 2023-06-10 09:33:19 +00:00
Karol Herbst
e65f561a75 ac/llvm: support vec2 on b2i16 
Since radeonsi sets the alu_to_scalar callback, frontends like Rusticl
might end up generating vec2 b2i16. Support this just like it's done for
b2f16.

Fixes: d692d433f2 ("radeonsi: use nir_lower_alu_to_scalar correctly")
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23551>
 2023-06-10 09:33:19 +00:00
Chia-I Wu
5ae953b5e9 radv: disable calibrated timestamps on raven/raven2 
amdgpu enables gfxoff by default and the feature resets the RLC clock
counter on idle on raven/raven2.  Querying AMDGPU_INFO_TIMESTAMP does
not work as expected on those platforms.

There was an attempt in amdgpu to read from the TSC register instead,
but it did not work without a firmware update[1].  Another possible
solution is to disable the clock counter reset by clearing
AMD_PG_SUPPORT_RLC_SMU_HS, but that causes a 0.2W increase of power
consumption on idle which is undesirable.

The clock counter reset affects vkCmdWriteTimestamp as well.  The spec
is vague on whether that is allowed or not.  The WG is aware of the
issue[2] but never really addresses it.

[1] https://lists.freedesktop.org/archives/amd-gfx/2023-May/093731.html
[2] https://github.com/KhronosGroup/Vulkan-Docs/issues/216

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23481>
 2023-06-10 07:02:08 +00:00
Vinson Lee
e1d948b6a2 frontends/va: Fix missing unlock 
Fix defect reported by Coverity Scan.

Missing unlock (LOCK)
missing_unlock: Returning without unlocking drv->mutex.

Fixes: af695149e9 ("frontends/va: pass in film_grain_target as new output")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23488>
 2023-06-10 06:01:59 +00:00
Martin Roukala (né Peres)
bb3cf3ff8e zink/ci: remove spec@nv_shader_atomic_int64@* from the fail lists 
Fixes: 56eb831155 ("aco: run nir_lower_int64 after nir_opt_uniform_atomics")
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23553>
 2023-06-10 04:55:39 +00:00
Mark Janes
0ce595a89a intel: use generated helpers for Wa_1508744258 
iris_disable_rhwo_optimization can only apply on gfxver 12.0, and has
a version check to that affect.  Add an assertion to warn us if the
workaround ever applies to another version.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21742>
 2023-06-10 00:05:51 +00:00
David Heidelberg
7b6629a694 ci: rename MINIO to S3 
We don't use MINIO for a long time. Rename variable accordingly.

Reviewed-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23527>
 2023-06-10 01:31:16 +02:00
David Heidelberg
e1737c46b9 ci: rename S3 artifacts according to scheme mesa-$arch-$config-$buildtype 
Make the S3 (previously MINIO) artifacts clearly identifiable by glance.

Also now we fail before compilation, if the job doesn't define
the BUILDTYPE variable to prevent confusion.

Reviewed-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23527>
 2023-06-10 01:31:13 +02:00
Mykhailo Skorokhodov
40042ed25a nir: Rematerialize derefs after opt_dead_cf 
Adding `nir_rematerialize_derefs_in_use_blocks_impl`
solves some cases when 'opt_dead_cf()' generates
a phi instruction for the first argument
of the `deref_store` intrinsic.

Signed-off-by: Mykhailo Skorokhodov <mykhailo.skorokhodov@globallogic.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Lionel Landwerlin's avatarLionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6742
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22983>
 2023-06-09 21:35:21 +00:00
Filip Gawin
fb8c48f4fc anv: allow intel_clflush_range only on igpu 
fixes: 521c216efc
closes: #9106

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23320>
 2023-06-09 21:09:50 +00:00
Caio Oliveira
26f6ea5c30 intel/compiler: Remove unused functions and declarations 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23539>
 2023-06-09 20:09:51 +00:00
Christian Gmeiner
62e0f6bf32 etnaviv: Add support for conditional rendering 
The hardware doesn't support native conditional rendering, so it is
implemented by software.

Code borrowed from Freedreno and Panfrost.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23392>
 2023-06-09 20:35:24 +02:00
Lucas Stach
a603413eb8 etnaviv: optimize transfer flushes 
Context flushes that are triggered by a pending write to the resource
don't need to realize visibility of the resource changes outside of
the context. Skip implicit resource flushes in those cases.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23549>
 2023-06-09 16:42:24 +00:00
Friedrich Vock
64fda091de aco: Lower divergent bool phis iteratively 
Avoids stack overflows with really large programs.

No fossil-db changes.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8760
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8701

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23531>
 2023-06-09 12:39:55 +00:00
Alyssa Rosenzweig
ba27071c8b agx: Fold addressing math into atomics 
Like our loads and stores, our global atomics support indexing with a 64-bit
base plus a 32-bit element index, zero- or sign-extended and multiplied by the
word size. Unlike the loads and stores, they do not support additional shifting
(it's not too useful), so that needs an explicit lowering.

Switch to using AGX variants of the atomics, running our address pattern
matching on global atomics in order to delete some ALU.

This cleans up the image atomic lowering nicely, since we get to take full
advantage of the shift + zero-extend + add on the atomic... The shift comes from
multiplying by the bytes per pixel.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23529>
 2023-06-09 12:06:00 +00:00
Alyssa Rosenzweig
13535d3f9d agx: Refactor expressions in agx_nir_lower_address 
So we can add more instructions without duplication.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23529>
 2023-06-09 12:06:00 +00:00
Alyssa Rosenzweig
5a55ef2fd1 nir: Add AGX atomic intrinsics 
This is a piece of cake with unified atomics :-) This will let us do our
addressing math tricks nice and easily.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23529>
 2023-06-09 12:06:00 +00:00
Alyssa Rosenzweig
06f4608c5b ir2: Drop lower_locals_to_regs call 
This is for producing (indirect) array register access. Since we don't handle
that, this is a no-op. Drop the call, it's pointless and misleading.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23529>
 2023-06-09 12:06:00 +00:00
Alyssa Rosenzweig
10fb9de9f6 lima: Drop lower_locals_to_regs call 
This is for producing (indirect) array register access. Since we don't handle
that, this is a no-op. Drop the call, it's pointless and misleading.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23529>
 2023-06-09 12:06:00 +00:00
Alyssa Rosenzweig
03175f61fc pan/mdg: Drop lower_locals_to_regs call 
This is for producing (indirect) array register access. Since we don't handle
that, this is a no-op. Drop the call, it's pointless and misleading.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Italo Nicola <italonicola@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23529>
 2023-06-09 12:06:00 +00:00
Martin Roukala (né Peres)
4f317d15d3 amd/ci: add another test to the vkcts-vega10 flake list 
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23547>
 2023-06-09 11:38:43 +00:00
Martin Roukala (né Peres)
b8c7665599 zink/ci: add more QBO-related fails on RADV 
These seem to have been forgotten during the original filing, probably
because more than 25 failures were found, and so deqp-runner limited
itself to 25.

References: #9174
Fixes: dad91dc7c4 ("zink: update some radv qbo fails")
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23547>
 2023-06-09 11:38:43 +00:00
Rhys Perry
56eb831155 aco: run nir_lower_int64 after nir_opt_uniform_atomics 
nir_opt_uniform_atomics can create 64-bit ALU instructions which need to
be lowered.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23502>
 2023-06-09 11:18:33 +00:00
Karol Herbst
948970c1eb rusticl/icd: use new proc macros 
This drops quite a lot of boilerplate code as this is now all generated
via our proc macros.

Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed by Nora Allen <blackcatgames@protonmail.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23413>
 2023-06-09 10:35:24 +00:00
Karol Herbst
e3bdc7cc23 rusticl/icd: make release return nothing 
I don't even know why it was like that...

Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23413>
 2023-06-09 10:35:23 +00:00
Karol Herbst
5875f2e803 rusticl: add proc macro module for generating API stubs 
Most of the API stubs are very very trivial to generate as the sole
purpose of those are to deconstruct the returned `Result` object.

Sadly we can't use external crates yet, so "syn" and "qoute" can't be used
for this :'(

The code is kinda hacky, but we also don't expose this to other people, so
we can keep this as a big hack until we can use external crates.

I wish there was a better solution here.

Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23413>
 2023-06-09 10:35:23 +00:00
Lucas Stach
b1cd5780d6 etnaviv: rs: unconditionally flush color and depth cache before using RS 
When the RS uses the pixel pipes it seems to destroy/invalidate any
content sitting in the color and depth caches from a previous draw.
Always flush the color and depth cache before using the RS to make
sure that any cache content written by the PE is properly flushed
to memory.

Fixes spec@!opengl 1.0@gl-1.0-drawpixels-depth-test and probably a
few others that are suffering from corruption of PE writes.

CC: mesa-stable
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23530>
 2023-06-09 10:17:42 +00:00
Lucas Stach
cfc1be9590 etnaviv: rs: flush TS cache before making configuration changes 
Move the TS cache flush into the same conditional block where
the TS setup is changed. TS cache always needs to be flushed
before making any changes to the TS setup.

CC: mesa-stable
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23530>
 2023-06-09 10:17:42 +00:00
Hyunjun Ko
c39521a929 anv/video: move video requirements to outarray. 
Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23519>
 2023-06-09 10:07:18 +02:00
Gert Wollny
7c78c346ff rusticl: compile r600 driver 
To really use the driver it still needs to be enabled with

  export RUSTICL_ENABLE=r600

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20252>
 2023-06-09 08:49:49 +02:00
Gert Wollny
33d878eb58 r600/sfn: Handle load_global in 64 to vec2 lowering 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20252>
 2023-06-09 08:49:49 +02:00
Gert Wollny
687e41da61 r600/sfn: Handle store_global when lowering 64 bit ops to vec2 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20252>
 2023-06-09 08:49:49 +02:00
Gert Wollny
9dbe936fe4 r600/sfn: Add experimental support for load/store_global 
This is needed for rusticl, but the results may be unexpected.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20252>
 2023-06-09 08:49:49 +02:00
Lionel Landwerlin
25de091753 intel/nir: switch ray query state tracking to local variables uint16_t 
We should be able to use uint8_t but there appears to be a backend
bug.

Q2RTX shader compute shader improvement with ray queries :

Totals:
Instrs: 102221 -> 101499 (-0.71%); split: -0.82%, +0.12%
Cycles: 4451260 -> 4396025 (-1.24%)
Send messages: 3587 -> 3585 (-0.06%)
Spill count: 717 -> 658 (-8.23%)
Fill count: 1248 -> 1214 (-2.72%); split: -3.21%, +0.48%
Scratch Memory Size: 21504 -> 16384 (-23.81%)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19982>
 2023-06-09 08:29:43 +03:00
Dave Airlie
085f6ec6eb radv/video: fix hevc scaling list order. 
pps takes priority.

Fixes: da54b57888 ("radv/video: fix hevc scaling lists.")
Reviewed-by: Lynne <dev@lynne.ee>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23537>
 2023-06-09 03:22:43 +00:00
Dave Airlie
4cc86e4ea9 radv/video: report bad profile operation if h264 profile isn't supported. 
Reviewed-by: Lynne <dev@lynne.ee>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23537>
 2023-06-09 03:22:43 +00:00
Qiang Yu
5024d8c763 radeonsi: enable aco support for gs copy shader 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23433>
 2023-06-09 10:53:49 +08:00