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Author SHA1 Message Date
Konstantin Seurer ee751a26fc radv/rra: Enable RADV_RRA_TRACE_COPY_AFTER_BUILD by default 
RADV_RRA_TRACE_COPY_AFTER_BUILD is more accurate and the memory issues
are fixed now.

Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29537>
 2024-06-21 17:47:53 +00:00
Konstantin Seurer aa1b9d9be5 radv/rra: Rework calculating the ray history size 
The previous approach was broken when writing empty metadata.

Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29537>
 2024-06-21 17:47:53 +00:00
Konstantin Seurer 090ca37352 radv/rra: Reduce the memory requirement of copy_after_build 
vkd3d-proton always sets the acceleration structure size to be the
whole buffer size. Because of that, allocating read back buffers
for all acceleration structures causes a system with a finite amount
of RAM to OOM.

This is solved by allocating read back buffers on build where the
required size is known.

Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29537>
 2024-06-21 17:47:53 +00:00
Konstantin Seurer c2c555402b radv/rra: Bump rt_driver_interface_version to 8.0 
8.0 matches the layout we emit more closely.

Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29537>
 2024-06-21 17:47:53 +00:00
Konstantin Seurer 55f1fe9bc3 radv/rra: Fix reporting the isec invocations 
Copy+paste mistake, we always set the last call to accept.

Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29537>
 2024-06-21 17:47:53 +00:00
Konstantin Seurer 97c0f264f0 radv/rra: Fix disabling the ray history 
There are a bunch of NULL pointer dereferences that went unnoticed
because the feature is enabled by default.

Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29537>
 2024-06-21 17:47:53 +00:00
Konstantin Seurer bd377cfe89 radv/rra: Move some code into handle_accel_struct_write 
The code is the same for all callers.

Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29537>
 2024-06-21 17:47:53 +00:00
Konstantin Seurer ea69f7bc89 radv/rra: Detect BVHs with back edges 
Avoid overflowing the stack and fail validation.

Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29537>
 2024-06-21 17:47:53 +00:00
Eric Engestrom b55158d536 venus/ci: drop fixed test from fails list 
Might be a flake though, we'll see in the next nightly.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29844>
 2024-06-21 17:24:32 +00:00
Eric Engestrom 98f9dd3c7c venus/ci: make sure nightly job doesn't get retried 
It's long enough as it is, we don't want to waste 2x the resources when
a test fails.

Fixes: 0db4bb2ea0 ("venus/ci: add manual/nightly venus-lavapipe-full")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29844>
 2024-06-21 17:24:32 +00:00
Rhys Perry 21f8410191 vtn: ensure TCS control barriers have a large enough memory scope 
A workgroup or larger scope is necessary for writes to be visible to other
invocations.

Fixes incorrect snow rendering in Indika.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11299
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29735>
 2024-06-21 16:24:08 +00:00
Alyssa Rosenzweig da752ed7c1 treewide: use nir_def_replace sometimes 
Two Coccinelle patches here. Didn't catch nearly as much as I would've liked but
it's a start.

Coccinelle patch:

    @@
    expression intr, repl;
    @@

    -nir_def_rewrite_uses(&intr->def, repl);
    -nir_instr_remove(&intr->instr);
    +nir_def_replace(&intr->def, repl);

Coccinelle patch:

    @@
    identifier intr;
    expression instr, repl;
    @@

    nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr);
    ...
    -nir_def_rewrite_uses(&intr->def, repl);
    -nir_instr_remove(instr);
    +nir_def_replace(&intr->def, repl);

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Juan A. Suarez Romero <jasuarez@igalia.com> [broadcom]
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com> [lima]
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com> [etna]
Reviewed-by: Pavel Ondračka <pavel.ondracka@gmail.com> [r300]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29817>
 2024-06-21 15:36:56 +00:00
Alyssa Rosenzweig bbdd34b4ad nir: add nir_def_replace helper 
"Rewrite and remove" is a super common idiom in NIR passes. Let's add a helper
to make it more ergonomic.

More the point, I expect that /most/ of the time when a pass rewrites uses, they
also want to remove the parent instruction. The principle reason not to is
because it takes extra effort to add in the nir_instr_remove and nir_opt_dce
will clean up after you eventually, right? From a compile time perspective, it's
better to remove earlier to reduce the redundant processing between the pass and
the next DCE run. So ... we want to be doing *more* removes. From a UX
perspective - the way to nudge devs towards that is to make the
preferred "rewrite-and-remove" pattern more ergonomic than the "rewrite but
keep". That justifies the simple "replace" name rather than something silly like
"rewrite_uses_and_remove".

---

Something else I've wanted for a while.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29817>
 2024-06-21 15:36:56 +00:00
Alyssa Rosenzweig 535823682d nir/format_convert: remove unorm bit size assert 
Yes, we're losing precision if this assert fails and it's wrong. It's also
necessary to implement GL in a reasonable way on Asahi. Remove the assert that
was recently added and add more comment context on the mess.

Fixes debug build regression on asahi:

   dEQP-GLES3.functional.vertex_arrays.single_attribute.normalize.int.components4_quads1

Fixes: 22f1b04a99 ("nir/format_convert: Assert that UNORM formats are <= 16 bits")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Suggested-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29820>
 2024-06-21 14:50:59 +00:00
Karol Herbst 1ff86021a7 rusticl: add new CL_INVALID_BUFFER_SIZE condition for clCreateBuffer 
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29776>
 2024-06-21 13:58:15 +00:00
Karol Herbst 4df8567394 rusticl/memory: fix clFillImage for buffer images 
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29776>
 2024-06-21 13:58:15 +00:00
Karol Herbst 45fc5c032e rusticl/memory: assume minimum image_height of 1 
But still report 0 for the slice_pitch when queried.

Fixes clCopyImage 1Dbuffer

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29776>
 2024-06-21 13:58:14 +00:00
Karol Herbst d51a14aab8 util/u_printf: properly handle %% 
Cc: mesa-stable
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29776>
 2024-06-21 13:58:14 +00:00
Konstantin Seurer 23ee6ca801 radv/meta: Use READ access for dst_access_flush 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29780>
 2024-06-21 12:52:39 +00:00
Konstantin Seurer 14f7b077c8 radv: Remove dead access bits 
READ access bits are dead as radv_src_access_flush arguments and WRITE
access bits are dead as radv_dst_access_flush arguments.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29780>
 2024-06-21 12:52:39 +00:00
Konstantin Seurer 1c59634445 radv: Clean up pipeline barrier handling 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29780>
 2024-06-21 12:52:39 +00:00
Connor Abbott ac34415e0f freedreno/a7xx: Fix register file size 
It was bumped back up to 96. Not sure about a6xx gen4.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29834>
 2024-06-21 12:21:54 +00:00
Connor Abbott 8e6ecf3df8 tu: Don't WFI after every dispatch 
I'm not sure why this was added back in 2019 before proper barrier
support, but it surely shouldn't be necessary now and is unnecessarily
serializing compute dispatches.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29815>
 2024-06-21 11:06:35 +00:00
Connor Abbott 35c9b7fb90 tu: Fix unaligned indirect command synchronization 
We need to wait to allow any previous uses to finish, and we have to
wait to allow the CACHE_INVALIDATE to finish before starting the
dispatch.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29815>
 2024-06-21 11:06:35 +00:00
Connor Abbott a0a662f72d freedreno, tu: Use CLEAN events on a7xx 
This should reduce unnecessary invalidates.

We could combine a CLEAN and INVLIDATE into a FLUSH, but I'm not sure
how much benefit that brings.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29824>
 2024-06-21 10:34:05 +00:00
Connor Abbott c7284c94ef tu: Use a7xx terminology for flushes 
a7xx renamed events around flushing:

a6xx              a7xx
FLUSH             CLEAN
INVALIDATE        INVALIDATE
FLUSH+INVALIDATE  FLUSH

The FLUSH events stayed the same but now they also invalidate. By not
adopting the new CLEAN events, we're inadvertantly invalidating too
much.

This change is just a refactor, that makes generic code consistently use
the a7xx terminology. The next commit will actually make us use CLEAN.

Note that LRZ_FLUSH is deliberately not changed because it actually
also invalidates (and the real name on a6xx was FLUSH_AND_INVALIDATE).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29824>
 2024-06-21 10:34:05 +00:00
Connor Abbott 0e220cd45a tu: Support VK_EXT_attachment_feedback_loop_dynamic_state 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23374>
 2024-06-21 09:06:53 +00:00
Connor Abbott 833a0cf76e tu: Use image aspects for feedback loops 
For consistency with the dynamic state.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23374>
 2024-06-21 09:06:53 +00:00
Lionel Landwerlin 339630ab05 brw: enable A64 loads source rematerialization 
Allows to avoid Wa_1407528679 on A64 loads

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29663>
 2024-06-21 08:29:44 +00:00
Lionel Landwerlin f482fc33cf brw: blockify load_global_const_block_intel 
This intrinsic is pretty much equivalent to
load_global_constant_uniform_block_intel, it just has a predicate. If
the predicate is always true we can turn into into the other.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29663>
 2024-06-21 08:29:44 +00:00
Lionel Landwerlin 6fe6b9c8fa brw: avoid Wa_1407528679 in uniform cases 
When the surface handles are generated with exec_all, we can avoid
emitting the workaround.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29663>
 2024-06-21 08:29:44 +00:00
Lionel Landwerlin 5227b2db73 brw: annotation send instructions with surface handles generated with exec_all 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29663>
 2024-06-21 08:29:44 +00:00
Lionel Landwerlin b79e85a93f brw: always use new registers for load address increments 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29663>
 2024-06-21 08:29:44 +00:00
Lionel Landwerlin 7f1ca16e3b brw: enable rematerialization of non 32bit uniforms 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29663>
 2024-06-21 08:29:44 +00:00
Lionel Landwerlin 0531f568ac brw: remove some brackets 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29663>
 2024-06-21 08:29:44 +00:00
Lionel Landwerlin 11a634151b brw: remove rematerialization assert 
The default case should lead us to the next rematerialization block so
this is useless.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29663>
 2024-06-21 08:29:44 +00:00
Lionel Landwerlin d42bc0d3fc brw: bound the amount of rematerialized NIR instructions 
Some of the instructions we don't need to rematerialize because we
already know they are executed with NoMask so we can use their
destination without reemitting them again.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29663>
 2024-06-21 08:29:44 +00:00
Lionel Landwerlin 4bfb4f35a8 brw: improve rematalization of surface/sampler handles 
This change handles patterns like this

con v0 = load_ubo ...
con v1 = add v0, 0x30
con v2 = load_ubo v1, 0x0

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29663>
 2024-06-21 08:29:44 +00:00
Lionel Landwerlin c7b312ad45 brw: factor out source extraction for rematerialization 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29663>
 2024-06-21 08:29:44 +00:00
Lionel Landwerlin 8fbbc9c301 brw: add missing break 
Not fixing anything because of the default case below.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29663>
 2024-06-21 08:29:44 +00:00
Lionel Landwerlin a869c57250 anv: don't apply descriptor array bound checking 
This is a follow up to 059e82a4 ("anv: remove descriptor array bounds
checking"), that kind of bound checking is not required by the spec.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29663>
 2024-06-21 08:29:44 +00:00
Eric Engestrom e3b73374cd egl: use os_get_option() to allow android to set EGL_LOG_LEVEL 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29816>
 2024-06-21 07:44:36 +00:00
Eric Engestrom c6987258da gallium/hud: use os_get_option() to allow android to set GALLIUM_HUD and related vars 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29816>
 2024-06-21 07:44:36 +00:00
Eric Engestrom 787e0751c5 loader: use os_get_option() to allow android to set LIBGL_DRIVERS_PATH, GBM_BACKENDS_PATH, GALLIUM_PIPE_SEARCH_DIR 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29816>
 2024-06-21 07:44:36 +00:00
Yukari Chiba 9bce6f5cc4 llvmpipe: make unnamed global have internal linkage 
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29796>
 2024-06-21 06:12:16 +00:00
Yukari Chiba fae6a8737a llvmpipe: add gallivm_add_global_mapping 
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29796>
 2024-06-21 06:12:16 +00:00
Dave Airlie 47cd0eee26 gallivm: create a pass manager wrapper. 
With the introduction of the orc jit and looking at the mess that
is integrating with LLVM pass mgmt, encapsulate the passmgr
interactions in an internal abstraction so it can be shared,
and the compiler code isn't so messy to read.

Acked-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29796>
 2024-06-21 06:12:16 +00:00
Mingcong Bai cfa0293c8b meson: set default Vulkan drivers for ppc, ppc64 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29827>
 2024-06-21 05:22:28 +00:00
Jianxun Zhang 02813f341b isl: Remove code for Xe2 from isl_gfx12.c 
Xe2 code is in isl_gfx20.* now.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11329

Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29702>
 2024-06-21 04:02:08 +00:00
Jianxun Zhang 4debb5bbc4 isl: Implement a part of WA_22018390030 (xe2) 
Fix: piglit test
gl-3.2-layered-rendering-clear-color-all-types 2d_array mipmapped -auto
-fbo

Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29702>
 2024-06-21 04:02:08 +00:00