Both EGL and Vulkan implementations require obtaining buffer metadata,
e.g., format, modifier, offsets, strides, etc.
Currently, mesa3d doesn't have a generic solution, and every Vulkan
implementation uses its getters. Most of the getters rely on
kernel metadata storage that is available for x86-based GPU drivers.
ARM-based Vulkan drivers rely on userspace metadata sharing, making it
important to use advanced metadata API. Otherwise, the driver will work
with limited functionality (no YUV, lack of support for modifiers, etc.)
Current EGL buffer getter implementation is advanced enough and used as
a base for a common Android buffer-getter logic.
Use example:
void
android_buffer_test(android_handle_type *a_handle)
{
// First, get the gralloc object. It will be created if it doesn't
// exist. Use U_GRALLOC_TYPE_AUTO to let the implementation choose
// the best gralloc
struct u_gralloc *gralloc = u_gralloc_create(U_GRALLOC_TYPE_AUTO);
// Prepare the internal handle structure (hal_format and
// pixel_stride are required for the fallback implementation).
// Both Vulkan and EGL clients expose HAL format / pixel stride
// in their structures.
u_gralloc_buffer_handle hnd = {
.handle = a_handle->native_handle,
.hal_format = a_handle->hal_format,
.pixel_stride = a_handle->pixel_stride,
};
// Get the basic buffer info
u_gralloc_buffer_basic_info basic_info;
int ret = u_gralloc_get_buffer_basic_info(gralloc, &hnd, &basic_info);
if (ret) {
// Handle the error
}
// Get the color info
u_gralloc_buffer_color_info color_info;
ret = u_gralloc_get_buffer_color_info(gralloc, &hnd, &color_info);
if (ret) {
// Handle the error
}
// unref the gralloc object
u_gralloc_destroy(&gralloc);
}
Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18215>
If the BO handle is greater than 2x what fits inside the current bitmap
size, then we end up overflowing. Make sure to always reallocate to a
large enough bitmap, not just 2x the previous size.
Found while replaying firefox apitraces with looping (which apparently
leaks a ton of objects, but that might just be apitrace).
Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24635>
Do not apply "nir_lower_fragcolor" in the common code.
This fix a crash on agxv side when a frag shader have SSBO writes.
This is caused by "nir_lower_frag_color" assuming that every
"store_deref" will have a variable backing the
output.
Signed-off-by: Mary <mary@mary.zone>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24635>
All affected shaders are in pubg. Presumably, with the new demand calculation,
RA is hitting a higher target thread count at the expense of a little more live
range splitting.
total instructions in shared programs: 1773295 -> 1773310 (<.01%)
instructions in affected programs: 6058 -> 6073 (0.25%)
helped: 0
HURT: 15
Instructions are HURT.
total bytes in shared programs: 11695360 -> 11695450 (<.01%)
bytes in affected programs: 40496 -> 40586 (0.22%)
helped: 0
HURT: 15
Bytes are HURT.
total halfregs in shared programs: 530844 -> 530724 (-0.02%)
halfregs in affected programs: 1785 -> 1665 (-6.72%)
helped: 15
HURT: 0
Halfregs are helped.
total threads in shared programs: 18909440 -> 18910400 (<.01%)
threads in affected programs: 12480 -> 13440 (7.69%)
helped: 15
HURT: 0
Threads are helped.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24635>
The mask is based on the format, which can be at most 32-bits per channel. So if
we have 64-bit loads/stores we're still using a 32-bit format with double the
bits set in the mask. This will fix validation fails with spilling.
No shader-db changes.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24635>
We can use extr to swap the low and high halves of a 32-bit register in one
instruction.
No shader-db changes, but it reduces xor's on a deqp I'm looking at. Yes, I'm
procrastinating on debugging deqps, how'd you guess?
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24635>
There's no good reason to allow non-immediate nesting values, and this lets us
use the (smaller) mov_imm instruction without special casing. This matches what
Metal produces, so it seems like a good preference.
total bytes in shared programs: 11720338 -> 11717310 (-0.03%)
bytes in affected programs: 2341580 -> 2338552 (-0.13%)
helped: 1385
HURT: 0
Bytes are helped.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24635>
Man, this expression was wrong. First of all, raw is 64-bit so our mask needs to
be too. Second, length is in bytes -- not bits -- so we need to multiply by 8 to
get something sensible. In effect, the old wrong expression would always use the
long encoding for ALU instructions... whoops. This particular bug probably goes
back to the very first version of agx_pack...
Massive improvement in code density. Noticed while comparing assembly with the
blob. It's my Saturday, I can pointless optimize if I want to.
total bytes in shared programs: 12175112 -> 11720338 (-3.74%)
bytes in affected programs: 11963800 -> 11509026 (-3.80%)
helped: 16624
HURT: 0
Bytes are helped.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24635>
Now that they're in the right blocks, this is easy. Includes an informal proof
and the implementation itself is built around a finite state machine, which
together meant this code worked on its first try :~)
And hey, it's a pointless little instruction saving optimization I've wanted to
do for a while~
Major note is that this HAS to be done after register allocation, since it
doesn't update the control flow graph and would introduce critical edges
if it tried to actually deleted the else block. The intuitive reason for this is
simple: sometimes RA needs to insert instructions into the else block, even if
it was empty in the original NIR, so we always need an else block even if we can
delete it with this pass after RA.
total instructions in shared programs: 1778390 -> 1776725 (-0.09%)
instructions in affected programs: 268459 -> 266794 (-0.62%)
helped: 1013
HURT: 0
Instructions are helped.
total bytes in shared programs: 12185102 -> 12175112 (-0.08%)
bytes in affected programs: 1927524 -> 1917534 (-0.52%)
helped: 1013
HURT: 0
Bytes are helped.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24635>
Roman Stratiienko