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156615 Commits

Author SHA1 Message Date
Mike Blumenkrantz edc804e50f zink: use zink_shader::info instead of zink_shader::nir::info 
no functional changes

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22266>
 2023-04-04 01:37:40 +00:00
Mike Blumenkrantz b33d5d1a98 zink: generate flat_flags during shader creation 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22266>
 2023-04-04 01:37:40 +00:00
Mike Blumenkrantz f26526ff33 zink: pass nir_shader to update_so_info() 
no functional changes

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22266>
 2023-04-04 01:37:40 +00:00
Mike Blumenkrantz f7b76d681b zink: add and populate a shader_info struct to zink_shader 
this avoids the need to use the nir pointer to access shader info

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22266>
 2023-04-04 01:37:40 +00:00
Mike Blumenkrantz eb30744562 zink: delete shader reordering in assign_io() 
this is a relic of when pipe_shader_type was different than gl_shader_stage

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22266>
 2023-04-04 01:37:40 +00:00
Alejandro Piñeiro bbd124fd00 v3dv/pipeline: use pipeline depth bias enabled to fill up CFG packet 
Even if the VkPipelineRasterizationStateCreateInfo sets
depthBiasEnable, internally we comput if it is really makes sense, and
use that to decide for example if we emit the Depth Offset packet.

But we were not using this to enable Depth Bias through the depth
offset enable field on the CFG packet.

So in some tests we were enabling depth bias, but not emitting the
packet to configure it, that seemed somewhat inconsistent.

This didn't cause any issue so far, but let's be conservative.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22252>
 2023-04-04 00:06:38 +00:00
Lionel Landwerlin a88aedbfa5 intel/perf: fix OA format selection on MTL 
Anything Gfx12.5+ has a different format.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 90c86fe63e ("intel: add MTL performance metrics")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22257>
 2023-04-03 23:34:17 +00:00
Lionel Landwerlin c61101f151 intel/dev: set a default valid kmd_type 
src/intel/perf/intel_perf_query_layout.c needs a valid kmd type to
look at the metrics

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 757e2dd692 ("intel/perf: Disable it for Xe KMD")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22257>
 2023-04-03 23:34:17 +00:00
Ian Romanick 2016d9f46c intel/fs: Rework the loop of opt_combine_constants that collects constants 
This is a bit more wordy, but it will greatly simplify some future
changes.

v2: Rebase on ADD3 changes.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Tested-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22274>
 2023-04-03 21:50:06 +00:00
Ian Romanick 9e4bb4bfcf intel/fs: Refactor part of opt_combine_constants to a separate function 
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Tested-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22274>
 2023-04-03 21:50:06 +00:00
Ian Romanick 593cde0432 intel/fs: Output opt_combine_constants debug to stderr 
It's a lot more useful to have it in the same stream with the
INTEL_DEBUG=fs output.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Tested-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22274>
 2023-04-03 21:50:06 +00:00
Iván Briano eadc64ab24 vulkan/wsi/display: do not dereference a NULL pointer 
Fixes dEQP-VK.wsi.direct_drm.swapchain.simulate_oom.*

Cc: mesa-stable

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19025>
 2023-04-03 20:21:17 +00:00
Faith Ekstrand 6ad5f885af vulkan: Drop VkRenderingSelfDependencyInfoMESA 
It's no longer needed as VK_EXT_attachment_feedback_loop_layout provides
everything we need.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22191>
 2023-04-03 18:13:01 +00:00
Faith Ekstrand b4c18b9b76 vulkan: Drop vk_render_pass_state::*self_dependenc* 
ANV was the only driver using them and now it's on feedback loop flags.
Other drivers should convert instead of depending on the old version.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22191>
 2023-04-03 18:13:01 +00:00
Faith Ekstrand 6d4e605378 hasvk/pipeline: Use feedback loop flags for self-dependencies 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22191>
 2023-04-03 18:13:01 +00:00
Faith Ekstrand 8df8a3c19b anv/pipeline: Use feedback loop flags for self-dependencies 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22191>
 2023-04-03 18:13:01 +00:00
Faith Ekstrand f3876db1ee vulkan: Plumb rendering flags through vk_graphics_pipeline_state 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22191>
 2023-04-03 18:13:01 +00:00
Connor Abbott f4b534d50f vk/render_pass: Support VK_EXT_fragment_density_map 
Support emulating "classic" FDM with dynamic rendering.

Reviewed-by: Faith Ekstrand <faith@gfxstrand.net>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22191>
 2023-04-03 18:13:01 +00:00
Connor Abbott df9694e98e tu: Use vk_pipeline_get_renderpass_flags() 
With this we can remove usage of VkSelfDependencyInfoMESA.

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22191>
 2023-04-03 18:13:01 +00:00
Jason Ekstrand bd26ae0086 vulkan: Record pipeline flags in the render pass 
This records any rendering pipeline flags in the render pass.  This
provides much-needed information for the VK_KHR_fragment_shading_rate
and VK_EXT_fragment_density_map extensions as well as provides an
alternative to VkRenderingSelfDependencyInfoMESA which is based on
VK_EXT_attachment_feedback_loop_layout.

v2 (Connor): Name something more general
v3 (Faith): Also add the FSR flag

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22191>
 2023-04-03 18:13:01 +00:00
Samuel Pitoiset 9582c1e52a radv/ci: add one more flake 
This one is randomly failing.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22258>
 2023-04-03 17:20:13 +00:00
Samuel Pitoiset d74790a865 zink/ci: remove primitive-id-no-gs-quads from the NAVI10 fail list 
It has been fixed too.

Fixes: 5fb8ba0eb8 ("zink/ci: remove `primitive-id-no-gs-quads` from radv-vangogh-fails")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22258>
 2023-04-03 17:20:13 +00:00
Rhys Perry f92994bb83 radv/gfx11: improve RT scratch allocation 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22232>
 2023-04-03 16:35:17 +00:00
Timur Kristóf 50e9a8f7c2 radv: Use linear_dispatch info in GFX11 task/mesh draw packet. 
This helps the CP (command processor) optimize mesh shader
dispatch when Y = Z = 1.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22222>
 2023-04-03 15:36:02 +00:00
Timur Kristóf e42d2bd534 nir: Gather compile time constant task->mesh dispatch size. 
Some GPUs such as AMD RDNA3 can use this information
to optimize mesh shader dispatches.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22222>
 2023-04-03 15:36:02 +00:00
Timur Kristóf 836204da25 aco: Better phi lowering for merge block when else-side is const. 
Add a new special case for binary merge blocks to boolean
phi lowerig. This special case benefits shaders that
have divergent branches with an empty else block,
for example all NGG culling shaders.

Fossil DB stats on Rembrandt (NGG culling enabled):

Totals from 61778 (45.79% of 134913) affected shaders:
SpillVGPRs: 2268 -> 2284 (+0.71%); split: -1.10%, +1.81%
CodeSize: 164317952 -> 162962772 (-0.82%); split: -0.83%, +0.00%
Instrs: 31249824 -> 30910686 (-1.09%); split: -1.09%, +0.00%
Latency: 154948555 -> 154781097 (-0.11%); split: -0.12%, +0.02%
InvThroughput: 30397664 -> 30370872 (-0.09%); split: -0.13%, +0.04%
VClause: 529239 -> 529229 (-0.00%); split: -0.00%, +0.00%
SClause: 783417 -> 783430 (+0.00%)
Copies: 2627570 -> 2595161 (-1.23%); split: -1.25%, +0.02%
Branches: 976506 -> 976508 (+0.00%); split: -0.00%, +0.00%

Fossil DB stats on GFX11 (NGG culling disabled):

Totals from 895 (0.66% of 134913) affected shaders:
SpillVGPRs: 2258 -> 2322 (+2.83%); split: -0.44%, +3.28%
CodeSize: 6229152 -> 6215880 (-0.21%); split: -0.37%, +0.16%
Scratch: 216576 -> 215808 (-0.35%); split: -0.47%, +0.12%
Instrs: 1202077 -> 1198396 (-0.31%); split: -0.43%, +0.13%
Latency: 15921336 -> 16000561 (+0.50%); split: -0.74%, +1.24%
InvThroughput: 7425765 -> 7474891 (+0.66%); split: -0.67%, +1.33%
VClause: 22976 -> 23008 (+0.14%); split: -0.03%, +0.17%
SClause: 38269 -> 38271 (+0.01%)
Copies: 123244 -> 123896 (+0.53%); split: -0.30%, +0.83%
Branches: 47570 -> 47574 (+0.01%); split: -0.00%, +0.01%

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21493>
 2023-04-03 14:36:07 +00:00
Timur Kristóf 81b4806d64 aco: Call dominator_tree before lower_phis. 
This just makes it possible to use the dominator
tree information during phi lowering.

No Fossil DB changes on GFX11.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21493>
 2023-04-03 14:36:07 +00:00
Timur Kristóf 0eb7c49c7f aco: Pop branch operands when targets are same in SSA elimination. 
The branch instruction is no longer conditional when the targets are the
same, so the operand is not necessary and can be removed.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21493>
 2023-04-03 14:36:07 +00:00
Timur Kristóf 739bd03c37 aco: Don't verify branch exec read when eliminating exec writes. 
Verifying that the branch instruction reads exec is not actually
necessary because the pattern that we look for already implies that.

This prepares for the next commit which will remove the exec operand
from branches that have the same target. These branches will no
longer read exec, but they should still get the same optimization.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21493>
 2023-04-03 14:36:07 +00:00
Timur Kristóf 9eb04d8f96 aco: Simplify get_phi_operand using Operand::c32_or_c64. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21493>
 2023-04-03 14:36:07 +00:00
Timur Kristóf 0211e66f65 aco: Don't remove exec writes that also write other registers. 
Don't eliminate an instruction that writes registers other than exec and scc.
It is possible that this is eg. an s_and_saveexec and the saved value is
used by a later branch.

Fixes: bc13049747
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21493>
 2023-04-03 14:36:07 +00:00
Timur Kristóf 54da863956 aco: Consider p_cbranch_nz as divergent branch too. 
A p_cbranch_nz instruction that reads exec is divergent too.

Fixes: f030b75b7d
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21493>
 2023-04-03 14:36:07 +00:00
Tatsuyuki Ishi 7fe469d6c8 radv: Pre-compute descriptor set layout hash. 
While analyzing cache loading performance, hashing the pipeline layout was
surprisingly consuming around 4% of time, sometimes close to the cost of
hashing shader modules.

Turns out we were hashing the pipeline layout on every pipeline creation.
Considering that pipeline layouts are usually deduplicated by the
application, this was amplifying the hashing cost by a big margin.

With Graphics Pipeline Library, we do need to rebuild the pipeline layout
by combining those from each library, but we can memoize the hash of the
descriptor set layout. The cost of re-hashing hashes is negligible since
each descriptor set layout can amount to 1–2KB in size.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22254>
 2023-04-03 08:46:08 +00:00
Nataraj Deshpande 71fe9dfe07 anv: Bump VkDeviceMemory objects limit to 4GB 
Android CTS 13_r4 tests dEQP-VK.memory.allocation.random* fail
with VK_ERROR_OUT_OF_DEVICE_MEMORY on ADL boards with 32GB memory
as memory allocation requests from DEQP are much larger(~2.9GB+)
based on device heap size/8.

Increase the limit to unsigned 32bit max(~4GB) which helps to
fix the dEQP-VK.memory.allocation.random* tests.

v1: Bound allocation by the largest memory heap size (Lionel Landwerlin)

v2: Clean up comments to reflect the code change (Ivan Briano)
    Update the value of MAX_MEMORY_ALLOCATION_SIZE (Lionel Landwerlin)

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22066>
 2023-04-03 06:18:52 +00:00
Lionel Landwerlin b7e5b3e318 isl: update max buffer size for SKL+ 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22066>
 2023-04-03 06:18:52 +00:00
Lionel Landwerlin 00fc927e52 anv: take care of maxStorageBufferRange being uint32_t 
Not fixing anything, but required for another fix.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22066>
 2023-04-03 06:18:52 +00:00
Qiang Yu 7be81a680b ac/llvm: remove ac_build_opencoded_load_format 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22045>
 2023-04-03 01:35:06 +00:00
Qiang Yu 1165758b8b ac/llvm,radeonsi: remove abi->load_inputs implementation 
No nir_load_input in VS now.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22045>
 2023-04-03 01:35:06 +00:00
Qiang Yu 894d92995c radeonsi: monolithic VS emit prolog in nir directly 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22045>
 2023-04-03 01:35:06 +00:00
Qiang Yu 531acf548a ac/llvm: move ac_fixup_ls_hs_input_vgprs to amd common 
To be shared with radeonsi.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22045>
 2023-04-03 01:35:06 +00:00
Qiang Yu 297f97a42b ac/llvm: vs_rel_patch_id can also be fixed up 
It's currently used when LS store output to LDS.
The LS/HS bug fix seems does not affect this case.
But we'd better treat it as other fixed args.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22045>
 2023-04-03 01:35:06 +00:00
Qiang Yu 7ab7eccddd radeonsi: add si_nir_lower_vs_inputs 
Ported from llvm:
* si_load_vs_input
* ac_build_opencoded_load_format
* ac_ufN_to_float
* get_vertex_index
* ac_build_fast_udiv_nuw

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22045>
 2023-04-03 01:35:06 +00:00
Qiang Yu 003d84b660 ac/nir: add ac_nir_load_arg_at_offset 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22045>
 2023-04-03 01:35:06 +00:00
Qiang Yu e6f69853be radeonsi: expose si_nir_load_internal_binding 
PS polygon stippling is going to use it too.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22045>
 2023-04-03 01:35:06 +00:00
Mauro Rossi b40e7dcf82 hasvk: include "vk_android.h" header in anv_android.c 
Fixes the following building errors:

../src/intel/vulkan_hasvk/anv_android.c:387:34: error: implicit declaration of function 'vk_alloc_ahardware_buffer' is invalid in C99 [-Werror,-
Wimplicit-function-declaration]
   struct AHardwareBuffer *ahw = vk_alloc_ahardware_buffer(pAllocateInfo);
                                 ^
../src/intel/vulkan_hasvk/anv_android.c:387:28: error: incompatible integer to pointer conversion initializing 'struct AHardwareBuffer *' with an expression of type 'int' [-Werror,-Wint-conversion]
   struct AHardwareBuffer *ahw = vk_alloc_ahardware_buffer(pAllocateInfo);
                           ^     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
2 errors generated.

Fixes: b16cfe23 ("vulkan,anv,hasvk,radv: Unify Android hardware buffer creation")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22251>
 2023-04-02 23:30:42 +02:00
Timur Kristóf 4de9a4b2b8 ac/nir: When task->mesh dispatch Y or Z are 0, also set X to 0. 
AMD recommends doing this to speed up the CP when it processes
the draw ring entries. LLPC also does this.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22211>
 2023-04-01 14:46:50 +00:00
Timur Kristóf 4683b21399 ac/nir: Store only lowest 8 bits for task draw ring DWORD3. 
When writing the draw ready bit, don't write the high 24 bits
of DWORD3, because that is used by the HW for something else
according to LLPC.

Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22211>
 2023-04-01 14:46:50 +00:00
Rhys Perry 6974e5479c aco: fix nir_var_shader_out barriers for task shaders 
These will be used in a future commit.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22211>
 2023-04-01 14:46:50 +00:00
Rob Clark d698bf0523 freedreno: Support the disable_throttling=true driconf option 
At this point, mostly just to make it easier to disable throttling for
performance debugging.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22224>
 2023-04-01 13:53:31 +00:00
Rob Clark 77a5778836 freedreno: Move driconf settings into sub-struct 
Organize all one of them in a single place before adding more.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22224>
 2023-04-01 13:53:31 +00:00