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Author SHA1 Message Date
Danylo Piliaiev ed16eedb2d ir3: print half-dst/src for ldib.b/stib.b 
So it would print:
 ldib.b.untyped.1d.u16.1.imm.base0 hr0.z, r0.x, 0
instead of:
 ldib.b.untyped.1d.u16.1.imm.base0 r0.z, r0.x, 0

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13876>
 2021-11-22 12:32:15 +00:00
Lionel Landwerlin 5a2cff9bc8 intel: move timestamp scaling helper to intel/perf 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13831>
 2021-11-22 11:52:46 +00:00
Lionel Landwerlin 6126742648 intel/ds: remove verbose messages 
At high frequency sampling, this generates a lot of messages.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13831>
 2021-11-22 11:52:46 +00:00
Lionel Landwerlin bd104d5b1a intel/pps: tweak intel config some more 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13831>
 2021-11-22 11:52:46 +00:00
Lionel Landwerlin 3d71e35857 intel/ds: isolate intel/perf from the pps-producer 
Otherwise we need to include intel headers in generic code.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13831>
 2021-11-22 11:52:46 +00:00
Lionel Landwerlin ed9116e545 intel/ds: drop unused constructors 
Reviewed-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13831>
 2021-11-22 11:52:46 +00:00
Lionel Landwerlin 215dbfd131 intel/perf: track end timestamp of queries 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13831>
 2021-11-22 11:52:46 +00:00
Lionel Landwerlin 4ef6698a26 intel/ds: drop timestamp correlation code 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13831>
 2021-11-22 11:52:46 +00:00
Lionel Landwerlin 21a1c6995c pps: fixup sporadic missing counters 
The issue seems to be that without proper timestamps & clock_id, the
recording might discard some packets if they go backward in time.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13831>
 2021-11-22 11:52:46 +00:00
Lionel Landwerlin 120f24cb36 intel/perf: add a helper to read timestamp from reports 
On newer HW it will require more work than just reading a dword. It
could also vary depending on the report format.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13831>
 2021-11-22 11:52:46 +00:00
Lionel Landwerlin 8657fa6b86 pps: allow drivers to report timestamps in their own time domain 
For this each driver must :

  - report its clock_id (if no particular clock just default to cpu
    boottime one)

  - be able to sample its clock (gpu_timestamp())

The PPSDataSource will then emit timestamp correlation events in the
trace ensuring perfetto is able to display GPU & CPU events
appropriately on its timeline.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13831>
 2021-11-22 11:52:46 +00:00
Juan A. Suarez Romero 457dbb81f5 broadcom/compiler: apply constant folding on early GS lowering 
This solves a case where a NIR geometry shader was storing the output in
a non-constant:

  vec4 32 ssa_1 = load_const (0xc0800000 /* -4.000000 */, 0xc1100000 /* -9.000000 */, 0x40400000 /* 3.000000 */, 0x40e00000 /* 7.000000 */)
  vec1 32 ssa_7 = load_const (0x00000000 /* 0.000000 */)
  vec1 32 ssa_8 = load_const (0x00000001 /* 0.000000 */)
  vec1 32 ssa_9 = iadd ssa_7, ssa_8
  vec1 32 ssa_19 = mov ssa_1.x
  intrinsic store_output (ssa_19, ssa_9) (1, 1, 0, 160, 288) /* base=1 */ /* wrmask=x */ /* component=0 */ /* src_type=float32 */ /* location=32 slots=2 gs_streams(x=0 y=0 z=0 w=0) */

When lowering the VPM output we check if the destination (ssa_9 in this
case) is a constant to add to the VPM offset. We run a constant folding
optimization in an earlier VS lowering, and we should do the same for
GS.

This fixes multiple dEQP-VK.pipeline.interface_matching.* failures.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13884>
 2021-11-22 09:32:50 +00:00
Juan A. Suarez Romero 7b21635057 broadcom/compiler: handle array of structs in GS/FS inputs 
While fragment and geometry shader were handling structs as inputs, they
weren't doing for it arrays of structures.

This fixes multiple dEQP-VK.pipeline.interface_matching.* failures and
assertions.

v2:
 - Fix style (Iago).

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13884>
 2021-11-22 09:32:50 +00:00
Lionel Landwerlin c5a42e4010 intel/fs: fix shader call lowering pass 
Now that we removed the intel intrinsic and just use the generic one,
we can skip it in the intel call lowering pass and just deal with it
in the intel rt intrinsic lowering.

v2: rewrite with nir_shader_instructions_pass() (Jason)

v3: handle everything in switch (Jason)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 423c47de99 ("nir: drop the btd_resume_intel intrinsic")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12113>
 2021-11-22 08:17:26 +00:00
Jesse Natalie 724a38eb94 CI/windows: Upload result.txt as an artifact 
Acked-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13893>
 2021-11-20 20:30:59 +00:00
Jesse Natalie 1e3db7923f CI/windows: Uprev piglit 
Acked-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13893>
 2021-11-20 20:30:59 +00:00
Alex Xu (Hello71) 60d95c5d0f Auto-enable TLSDESC support 
TLSDESC speeds up access to dynamic TLS. This is especially important
for non-glibc targets, but is also helpful for non-initial-exec TLS
variables.

The entry asm does not support TLSDESC, but it only accesses
initial-exec symbols, so it is not necessary to handle that separately.

Acked-by: Tapani Pälli <tapani.palli@intel.com>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12722>
 2021-11-20 11:57:40 -05:00
Alex Xu (Hello71) 8570a2a280 Use initial-exec TLS for glibc only, enable TLS elsewhere 
It is not portable to use initial-exec TLS in dlopened libraries. glibc
and FreeBSD allocate extra memory for extra initial-exec variables
specifically for libGL, but other libcs including musl do not.

Keep initial-exec disabled on FreeBSD since it is apparently broken for
some reason:

https://gitlab.freedesktop.org/mesa/mesa/-/issues/966#note_394512
https://github.com/jbeich/mesa/commit/81dbdb15d55054242eded0eb2f32621d583c1aaf

Enable TLS on OpenBSD and Haiku based on the u_thread.h comment that
emutls is better than pthread_getspecific, which seems plausible given
that emutls has strictly more information to work with.

Fixes #966.

Acked-by: Tapani Pälli <tapani.palli@intel.com>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12722>
 2021-11-20 11:56:34 -05:00
Ilia Mirkin df005c2a65 mesa: move around current texture object fetching 
We have to validate the target before fetching the current texture
object. Move this so that it happens later.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13767>
 2021-11-19 20:45:35 -05:00
Ilia Mirkin d814539c2b mesa: check target/format for Tex(ture)StorageMem* 
Noticed while doing an audit around _mesa_get_current_tex usage.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13767>
 2021-11-19 20:45:13 -05:00
Mauro Rossi f659d00000 android: define cpp_rtti=false because libLLVM is built w/o RTTI 
libLLVM for Android is built without RTTI, but after commit ad86267
mesa inherits meson default RTTI enabled state

cpp_rtti=false is added to meson options in android/mesa3d_cross.mk

Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13888>
 2021-11-20 02:25:12 +01:00
Marek Olšák cdeecadcb6 radeonsi: deduplicate min_esverts code in gfx10_ngg_calculate_subgroup_info 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13829>
 2021-11-20 00:03:45 +00:00
Marek Olšák 9d7ac70ffb radeonsi: implement shader culling in GS 
It already does compaction, so we just need to load vertex positions
and cull. This was easier than expected.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13829>
 2021-11-20 00:03:45 +00:00
Marek Olšák 492a61fe72 radeonsi: don't use ctx.stage outside of si_llvm_translate_nir 
si_llvm_translate_nir() changes ctx.stage, so the outside code shouldn't
use it. This hasn't caused any issues yet. Since ctx.stage starts as 0,
the first use in this commit was a tautology.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13829>
 2021-11-20 00:03:45 +00:00
Marek Olšák 1c5899900d radeonsi: simplify si_get_vs_key_outputs for GS 
ngg_culling is always 0 when GS is enabled. This will change in the future.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13829>
 2021-11-20 00:03:45 +00:00
Marek Olšák a368385b23 radeonsi: add is_gs parameter into si_vs_needs_prolog 
and disable the VS prolog code for GS.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13829>
 2021-11-20 00:03:45 +00:00
Marek Olšák f96d1757bb radeonsi: restructure code that declares merged VS-GS and TES-GS SGPRs 
no change in the SGPR layout

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13829>
 2021-11-20 00:03:45 +00:00
Marek Olšák 2418da2d4a radeonsi: separate culling code from VS/TES (to be reused by GS) 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13829>
 2021-11-20 00:03:45 +00:00
Nicholas Bishop 37c3e16d35 mesa/get: allow NV_pixel_buffer_object constants in GLES2 
The NV_pixel_buffer_object extension can be available in a GLES2
context, so the PIXEL_PACK_BUFFER_BINDING/PIXEL_UNPACK_BUFFER_BINDING
constants should also be available.

Tested on 8086:2e12, "Mesa DRI Intel(R) Q45/Q43 (ELK)".

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5655
Signed-off-by: Nicholas Bishop <nicholasbishop@google.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13862>
 2021-11-19 23:21:52 +00:00
Jesse Natalie b8f41c5c4e d3d12: Validate opened D3D12 resource matches pipe template 
Unlike Linux dma-bufs, D3D12 resources are strongly typed, and
can't necessarily just reinterpret the memory arbitrarily.

Allow importing resources with no description coming from the frontend,
and populate the resource desc from the driver instead. If there was
a template, make sure that it matches the incoming resource.

Reviewed-by: Bill Kristiansen <billkris@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13054>
 2021-11-19 22:54:46 +00:00
Jesse Natalie 9740141b2e d3d12: Generate a pipe format -> typeless mapping table too 
Reviewed-by: Bill Kristiansen <billkris@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13054>
 2021-11-19 22:54:46 +00:00
Jesse Natalie ca7d4fcb3f d3d12: Generate format table using a macro list 
Reviewed-by: Bill Kristiansen <billkris@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13054>
 2021-11-19 22:54:46 +00:00
Jesse Natalie 25bcc56027 d3d12: Make format list all use macros 
Reviewed-by: Bill Kristiansen <billkris@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13054>
 2021-11-19 22:54:46 +00:00
Jesse Natalie 96012b686e d3d12: Handle import/export of fd shared handles 
Reviewed-by: Bill Kristiansen <billkris@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13054>
 2021-11-19 22:54:46 +00:00
Jesse Natalie 31c7a04b47 winsys/d3d12: Populate winsys handle format 
All other winsys handle users do so, and a future commit will
start caring about it.

Reviewed-by: Bill Kristiansen <billkris@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13054>
 2021-11-19 22:54:46 +00:00
Jesse Natalie 2771fd4a3f gallium, windows: Use HANDLE instead of FD for external objects 
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Bill Kristiansen <billkris@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13054>
 2021-11-19 22:54:46 +00:00
Jesse Natalie 5bfbf4bec9 microsoft/compiler: Handle GLES external textures 
Reviewed-by: Bill Kristiansen <billkris@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13054>
 2021-11-19 22:54:46 +00:00
Jesse Natalie 2188607014 d3d12: Support RGBX formats mapped to RGBA 
Reviewed-by: Bill Kristiansen <billkris@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13054>
 2021-11-19 22:54:46 +00:00
Jesse Natalie ab9948997a d3d12: Support PIPE_CAP_MIXED_COLOR_DEPTH_BITS 
Reviewed-by: Bill Kristiansen <billkris@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13054>
 2021-11-19 22:54:46 +00:00
Jesse Natalie e0576ec148 d3d12: Support BGRA 555 and 565 formats 
Reviewed-by: Bill Kristiansen <billkris@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13054>
 2021-11-19 22:54:46 +00:00
Jesse Natalie d0bc4974fa android: Allow forcing softpipe 
When dealing with swrast, there's two possibilities: If you have LLVM, you get
llvmpipe, which is pretty fast. If you don't, you get softpipe, which is slow,
but does have a couple nice qualities, like being smaller and not needing
executable memory for JIT.

If you're building a driver that requires LLVM like radeonsi then you need the
LLVM stub for the build to find LLVM. But for swrast, since it can mean either
softpipe/llvmpipe, you don't strictly need LLVM. So this just makes the
Android build files flexible like the Meson build files (where you can specify
-Dllvm=disabled even if LLVM is findable).

Reviewed-by: Roman Stratiienko <r.stratiienko@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13532>
 2021-11-19 21:21:35 +00:00
Jesse Natalie 33e5a4378e android,d3d12: Support using DirectX-Headers dependency from AOSP 
Note that the Android build system apparently lowercases stuff,
so add a lowercase "directx-headers" dependency which is searched first,
before falling back to the proper-cased "DirectX-Headers" dependency.

Reviewed-by: Roman Stratiienko <r.stratiienko@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13532>
 2021-11-19 21:21:35 +00:00
Jesse Natalie 6138b047e2 mesa/main, android: Log errors to logcat 
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13532>
 2021-11-19 21:21:35 +00:00
Jesse Natalie 9e82a56745 android: Add a BOARD CFlags option so build can be customized 
Reviewed-by: Roman Stratiienko <r.stratiienko@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13532>
 2021-11-19 21:21:35 +00:00
Mike Blumenkrantz 81cc94b8f0 zink: be consistent about waiting on context queue on context destroy 
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13885>
 2021-11-19 18:56:10 +00:00
Mike Blumenkrantz e92b8956c7 zink: set batch state queue on creation 
make this easier to find

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13885>
 2021-11-19 18:56:10 +00:00
Emma Anholt b8ffd7a888 freedreno/a5xx: Emit MSAA state for sysmem rendering, too. 
This looked obviously wrong, we want to set the sample counts for sysmem
too just like we do on 6xx.  Turns out it fixes some piglits.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13867>
 2021-11-19 17:24:11 +00:00
Emma Anholt 5071d39cb2 freedreno/a5xx: Document the sRGB bit on RB_2D_SRC/DST info. 
Noticed while looking through my set of traces for where the average bit
might be.  Same spot as on a6xx.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13867>
 2021-11-19 17:24:11 +00:00
Emma Anholt 1ef6465665 freedreno/a5xx: Define a5xx_2d_surf_info like a6xx has. 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13867>
 2021-11-19 17:24:11 +00:00
Emma Anholt cad0b6e2e5 freedreno/a6xx: Disable sample averaging on non-ubwc z24s8 MSAA blits. 
The fallback path we averages unorm textures, but if we don't have ubwc on
either then we can just cast them to uint which then just takes sample 0.

The proper UBWC format I think ends up averaging, though.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13867>
 2021-11-19 17:24:11 +00:00