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Author SHA1 Message Date
Echo J
ec79f0c3cc compiler/rust: Force native build for the compiler_proc library 
This should fix the 32-bit build of NVK (with NAK included)

Fixes: ab72be6c5e ("nak,compiler: Move AsSlice to common code")
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30561>
 2024-08-08 14:41:52 +00:00
Lionel Landwerlin
10533e7b4c anv/blorp: force CC_VIEWPORT reallocation when programming 3DSTATE_VIEWPORT_STATE_POINTERS_CC 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11647
Fixes: fe1baa6481 ("anv: reduce blorp dynamic state emissions")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30532>
 2024-08-08 14:13:39 +00:00
Eric R. Smith
004e0eb3ab panfrost: use RGB1 component ordering for R5G6B5 pixel formats 
For some purposes (e.g. advanced blending) we need a non-zero alpha
value returned from reads. This is only guaranteed on Bifrost if
we explicitly request RGB1 component ordering. The default is to use
RGBA component ordering, which for R5G6B5 causes 0 to be read for
alpha.

A complication is that the Mali fixed function hardware requires
four components (which implies RGBA rather than RGB1). If fixed
function blending is in use, we modify the pixel format back to
RGBA when building the blend descriptor.

Cc: mesa-stable
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29606>
 2024-08-08 13:42:34 +00:00
Connor Abbott
5ab29555cf egl/x11: pass render fd to screen create for zink 
Fixes: f43883cf67 ("egl/gbm: rip out DRI_SWRAST")

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30563>
 2024-08-08 12:55:50 +00:00
Danylo Piliaiev
bfe5fa330b tu/u_trace: dispatch indirect dims and LRZ status as indirect params 
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30513>
 2024-08-08 12:25:25 +00:00
Danylo Piliaiev
762851e5d8 tu/u_trace: Add support for u_trace inidirect params 
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30513>
 2024-08-08 12:25:25 +00:00
Danylo Piliaiev
1fcbd720fc freedreno: Add enum for fd_lrzfc_layout::dir_track values 
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30513>
 2024-08-08 12:25:25 +00:00
Eric R. Smith
3135f76331 panfrost: fix texture.border_clamp regression for valhall 
We have to swizzle the border color in order to offset the
automatic swizzling introduced to compensate for limited
component order support in AFBC/AFRC. However, the border color
format is only available if the `TEXTURE_BORDER_COLOR_QUIRK` is
enabled, so set that for v10 (it was already set for v7).

While testing, we uncovered another issue: valhall introduces a
swizzle for depth+stencil formats that isn't present for bifrost, and
also isn't needed (or wanted) for the border color. So ignore the
border color swizzle for depth+stencil on valhall (on bifrost the
swizzle is a no-op anyway).

Fixes: 87aad0a5e4 ("panfrost: encode component order as an inverted swizzle (v10)")
Reviewed-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30542>
 2024-08-08 11:59:34 +00:00
Georg Lehmann
f36fccabf5 aco: optimize 64bit find_lsb/find_msb 
No Foz-DB changes, but this should be better, especially for gfx6-7 where
uadd_sat is 2 instructions.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30549>
 2024-08-08 11:15:55 +00:00
David Heidelberg
c2bbdda39b intel/genxml: fix length of HCP_FQM_STATE for gen20 and 125 
Fixes: 7f280e1e93 ("intel/genxml: fix some length of HCP_FQM_STATE")
Acked-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30558>
 2024-08-08 19:43:41 +09:00
Lucas Fryzek
cebb2bf266 lavapipe: Add AHB extension 
Implement `VK_ANDROID_external_memory_android_hardware_buffer` on
lavapipe.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29344>
 2024-08-08 09:04:47 +00:00
Lucas Fryzek
a4de39c10d docs/android: Add llvmpipe instructions 
Add instructions for how to build llvmpipe for android as well as
documentation to build an Android image that directly includes the
out-of-tree built libraries.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29344>
 2024-08-08 09:04:47 +00:00
Lucas Fryzek
0dce939e6d lavapipe: Add android platform integration 
Allow lavapipe to be loaded by the Android vulkan loader. Also provides
window system integration through the `VK_ANDROID_native_buffer`
extension.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29344>
 2024-08-08 09:04:47 +00:00
Lucas Fryzek
cfd897bae0 vulkan/runtime: Use DMA_BUF to import anb 
Switch to using DMA_BUF to import android native buffers instead of
opaque FDs since more drivers (like lavapipe) can support dma bufs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29344>
 2024-08-08 09:04:47 +00:00
Lucas Fryzek
df96cac2cf llvmpipe: Add android platform integration 
Allow llvmpipe to run on Android without any drm device present.
Previously llvmpipe would only run with kms_swrast, still requiring
a drm device driver to be present for the display.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29344>
 2024-08-08 09:04:47 +00:00
Lucas Fryzek
4009709bc3 egl/surfaceless: Add error checking to create image 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29344>
 2024-08-08 09:04:47 +00:00
Collabora's Gfx CI Team
cf2b156f2e Uprev Piglit to 0453436872b6e4d502c2e87817addb95e0d77e3b 
4a62c26721...0453436872

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30559>
 2024-08-08 02:25:45 +00:00
Faith Ekstrand
ab72be6c5e nak,compiler: Move AsSlice to common code 
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30443>
 2024-08-07 21:08:19 +00:00
Faith Ekstrand
3ca448a549 nak: Replace the guts of Srcs/DstsAsSlice with a new AsSlice trait 
This new trait is way more generic and shareable.  It does mean a bit of
gymnastics with traits to keep from retyping the whole compiler but the
result is something we can potentially share with other compilers.

Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30443>
 2024-08-07 21:08:19 +00:00
Faith Ekstrand
bc58881b9f nak: Move DstsAsSlice::is_uniform() to its own trait 
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30443>
 2024-08-07 21:08:19 +00:00
Faith Ekstrand
35353a7368 nak: Switch to the common NIR wrappers 
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30443>
 2024-08-07 21:08:19 +00:00
Faith Ekstrand
2cb77cc0dc compiler/rust/nir: Add explicit lifetimes 
This adds explicit lifetimes to any function which looks at a NIR
object, fishes a pointer out of it, and returns a reference.  The theory
of operation for these NIR wrappers is that everything holds an implicit
shared reference to the whole shader and so this is safe to do as long
as no one ever has a mut reference to anything.  However, since these
methods are turning pointers into references, it's a lot more obvious
what's going on if we have explicit lifetimes.

Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30443>
 2024-08-07 21:08:18 +00:00
Faith Ekstrand
3ebeee9166 compiler/rust/nir: Implement NIR types directly 
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30443>
 2024-08-07 21:08:18 +00:00
Faith Ekstrand
d723ae9814 compiler/rust: Copy the Rust NIR wrappers from NAK 
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30443>
 2024-08-07 21:08:18 +00:00
Christian Gmeiner
ad4a7e32f3 nak: Move cfg to compiler crate 
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30443>
 2024-08-07 21:08:18 +00:00
Christian Gmeiner
05bf03c3db nak: Move bitset to compiler crate 
This commit intorduces src/compiler/rust crate, which will have
different modules that help to write a backend compiler in Rust.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30443>
 2024-08-07 21:08:18 +00:00
Marek Olšák
6bba7b685e radeonsi: strengthen the condition determining OREO_MODE 
No change in behavior.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30525>
 2024-08-07 20:35:18 +00:00
Marek Olšák
97d664b22f ac/surface/gfx12: turn off HiZ for pre-production samples 
Fixes: f703dfd1bb - radeonsi: add gfx12

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30525>
 2024-08-07 20:35:18 +00:00
Mike Blumenkrantz
b594d64464 llvmpipe: init fd=-1 to avoid closing fd=0 on failure 
this otherwise breaks the universe

Fixes: d21aa86b54 ("llvmpipe: Implement EGL_ANDROID_native_fence_sync")

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30554>
 2024-08-07 20:08:11 +00:00
Iván Briano
90defc0087 anv: handle VK_PIPELINE_CREATE_VIEW_INDEX_FROM_DEVICE_INDEX_BIT 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30329>
 2024-08-07 19:09:55 +00:00
Iván Briano
7fce39484e nir: add pass to convert ViewIndex to DeviceIndex 
Used to implement VK_PIPELINE_CREATE_VIEW_INDEX_FROM_DEVICE_INDEX_BIT_KHR.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30329>
 2024-08-07 19:09:55 +00:00
Georg Lehmann
b6d3f666ab nir/peephole_select: ignore masked/quad swizzle without fetch_inactive 
Without fetch_inactive, these instructions need to return 0 for inactive lanes
and peephole_select changes which instructions are inactive.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30540>
 2024-08-07 20:21:05 +02:00
Eric Engestrom
9568976c52 android: fix build in multiple ways 
Includes the libgallium versioning, the megadriver hardlink -> symlink
change, and some fixes for things like abusing ls output.

backport-to: 24.2

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30470>
 2024-08-07 18:07:09 +00:00
Guilherme Gallo
ae15b656ef bin/ci: crnm: Use frozen set for statuses 
Let's be defensive and use `frozenset` from Python to avoid changing
global variables during the runtime (or any static part of code).

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30526>
 2024-08-07 17:25:46 +00:00
Guilherme Gallo
24d64102fe bin/ci: crnm: Don't overwrite the global sets 
The skip_follow_statuses variable, used to check if we need to stay
monitoring the pipeline instead of jumping to the target job traces, is
based on COMPLETED_STATUSES set. But, in Python, we do shallow copies by
default, and changes on skip_follow_statuses reflected on
COMPLETED_STATUSES, which was making manual dependencies stop playing
when --force-manual was not given.

Fixes: 84d401aebf0832741716f947dd7e2e9aac1221ac

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30526>
 2024-08-07 17:25:46 +00:00
Agate, Jesse
282ad9d864 amd/vpelib: Refactor frontend and backend config callback 
Refactor and rename frontend and backend config callback.

Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Acked-by: Jack Chih <chiachih@amd.com>
Signed-off-by: Jesse Agate <Jesse.Agate@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30531>
 2024-08-07 16:46:25 +00:00
Alan Liu
4886ee5caf amd/vpelib: Amend log for tone map support check 
[Why & How]
Amend the log when failing to support tone mapping.

Reviewed-by: Tomson Chang <tomson.chang@amd.com>
Reviewed-by: Jude Shih <Jude.Shih@amd.com>
Acked-by: Jack Chih <chiachih@amd.com>
Signed-off-by: Alan Liu <haoping.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30531>
 2024-08-07 16:46:25 +00:00
Kovac, Krunoslav
c5e2c4feaf amd/vpelib: Refactor MPC registers 
Refactor MPC registers.
3DLUT programming is largely the same but register are renamed to be in
VPMPC_RMCM (as opposed to VPMPCC_MCM). Note that they are still inside
MCM so governed by MCM control location.

Reviewed-by: Roy Chan <Roy.Chan@amd.com>
Acked-by: Jack Chih <chiachih@amd.com>
Signed-off-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30531>
 2024-08-07 16:46:25 +00:00
Agate, Jesse
63d8fa3f28 amd/vpelib: Refactor structs for API change 
Refactor structs for API change.

Reviewed-by: Roy Chan <Roy.Chan@amd.com>
Acked-by: Jack Chih <chiachih@amd.com>
Signed-off-by: Jesse Agate <Jesse.Agate@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30531>
 2024-08-07 16:46:25 +00:00
Hsieh, Mike
5e3b3ed8f7 amd/vpelib: Refactor OPP registers 
Refactor OPP registers.

---------

Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Acked-by: Jack Chih <chiachih@amd.com>
Signed-off-by: Mike Hsieh <Mike.Hsieh@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30531>
 2024-08-07 16:46:25 +00:00
Kovac, Krunoslav
914eb0a212 amd/vpelib: MPC refactoring HW registers 
In order to be able to share HW registers, some refactoring
is needed.

Reviewed-by: Roy Chan <Roy.Chan@amd.com>
Reviewed-by: Tomson Chang <tomson.chang@amd.com>
Acked-by: Jack Chih <chiachih@amd.com>
Signed-off-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30531>
 2024-08-07 16:46:25 +00:00
Assadian, Navid
a76d1aa565 amd/vpelib: Fix whitepoint for geometric downscaling 
Fix whitepoint for geometric down scaling.

---------

Reviewed-by: Roy Chan <Roy.Chan@amd.com>
Acked-by: Jack Chih <chiachih@amd.com>
Signed-off-by: Navid Assadian <navid.assadian@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30531>
 2024-08-07 16:46:25 +00:00
Visan, Tiberiu
30a28b76c8 amd/vpelib: set the same range for clr adj 
Change the range for color adjustments and also modify bright cap.

Reviewed-by: Roy Chan <Roy.Chan@amd.com>
Acked-by: Jack Chih <chiachih@amd.com>
Signed-off-by: Tiberiu Visan <Tiberiu.Visan@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30531>
 2024-08-07 16:46:25 +00:00
Assadian, Navid
e1ef91ac2a amd/vpelib: Fix CS translation for geometric downscaling 
Geometric downscaling uses RGB10 as the intermediate format. The support for P601 and JFIF with RGB formats is added.

Co-authored-by: Roy Chan <roy.chan@amd.com>
Reviewed-by: Roy Chan <Roy.Chan@amd.com>
Acked-by: Jack Chih <chiachih@amd.com>
Signed-off-by: Navid Assadian <navid.assadian@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30531>
 2024-08-07 16:46:25 +00:00
Assadian, Navid
699f88f844 amd/vpelib: Add API function to get taps 
A module to calculate the number of taps is added to the API.
Additionally, the get_optimal_taps module is moved from dpp to resource.

Reviewed-by: Roy Chan <Roy.Chan@amd.com>
Acked-by: Jack Chih <chiachih@amd.com>
Signed-off-by: Navid Assadian <navid.assadian@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30531>
 2024-08-07 16:46:25 +00:00
Assadian, Navid
4fc221524c amd/vpelib: Change Max DS support to 4:1 
Since VPE can use upto 8 taps, for quality purpose vpelib cannot support
downscaling ratio more than 4:1. The caps value needed to be modified to
reject this case earlier.

Reviewed-by: Roy Chan <Roy.Chan@amd.com>
Acked-by: Jack Chih <chiachih@amd.com>
Signed-off-by: Navid Assadian <navid.assadian@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30531>
 2024-08-07 16:46:25 +00:00
Kovac, Krunoslav
e6dd0de4d9 amd/vpelib: DPP starting changes 
Refactor DPP registers to split into common and version specific.

Gamut remap for DPP will likely move to MPC. For this, we need MPC changes
and refactor program_front_end/back_end so the correct block does it.

Reviewed-by: Roy Chan <Roy.Chan@amd.com>
Acked-by: Jack Chih <chiachih@amd.com>
Signed-off-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30531>
 2024-08-07 16:46:25 +00:00
Lin, Ricky
54d1d41e10 amd/vpelib: Added JFIF format to RGB output side 
Added JFIF format to RGB output side, due to geometric scaling will
change cs parameter to JFIF.

---------

Reviewed-by: Tomson Chang <tomson.chang@amd.com>
Acked-by: Jack Chih <chiachih@amd.com>
Signed-off-by: rickylin <ricky.lin@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30531>
 2024-08-07 16:46:25 +00:00
Hsieh, Mike
746556d585 amd/vpelib: Remove deprecated update_3dlut flag 
[WHY & HOW]
update_3dlut flag has been replaced by UID mechanism.
Remove update_3dlut flag and update related functions.

Reviewed-by: Jesse Agate <jesse.agate@amd.com>
Reviewed-by: Tomson Chang <tomson.chang@amd.com>
Acked-by: Jack Chih <chiachih@amd.com>
Signed-off-by: Mike Hsieh <Mike.Hsieh@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30531>
 2024-08-07 16:46:25 +00:00
Paulo Zanoni
0e38b794e2 intel: fix compute SLM sizes on Xe2 and newer 
Before the patch, intel_device_info_get_max_preferred_slm_size()
returns values in kilobytes, but then
intel_device_info_get_max_slm_size() is multiplying it by 1024.
As a result, LNL is reporting maxComputeSharedMemorySize to be
134217728, which is 128mb.

Fix this by making intel_device_info_get_max_slm_size() not multiply
it by 1024.

This should fix at least the following dEQP tests:
    dEQP-VK.compute.pipeline.zero_initialize_workgroup_memory.max_workgroup_memory.1
    dEQP-VK.compute.pipeline.zero_initialize_workgroup_memory.max_workgroup_memory.128
    dEQP-VK.compute.pipeline.zero_initialize_workgroup_memory.max_workgroup_memory.16
    dEQP-VK.compute.pipeline.zero_initialize_workgroup_memory.max_workgroup_memory.2
    dEQP-VK.compute.pipeline.zero_initialize_workgroup_memory.max_workgroup_memory.4
    dEQP-VK.compute.pipeline.zero_initialize_workgroup_memory.max_workgroup_memory.64

Some tests were failing with:
    deqp-vk: ../../src/intel/common/intel_compute_slm.c:24: slm_encode_lookup: Assertion `kbytes <= table[table_len - 1].size_in_kb' failed.
while other tests were triggering the OOM.

v2:
 - Make everybody return sizes in bytes (José).
v3:
 - Rename variable to bytes (José, Jordan).

Fixes: fd368f5521 ("anv: Set maxComputeSharedMemorySize value for Xe2 platforms")
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30541>
 2024-08-07 16:14:02 +00:00