Lucas Fryzek
eb70d66228
anv: Add external format resolve operation using blorp
...
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37177 >
2025-10-09 18:42:13 +00:00
Lucas Fryzek
48b63ee90d
vulkan/runtime: Add logic to set external format resolve mode
...
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37177 >
2025-10-09 18:42:13 +00:00
Lucas Fryzek
131f4ca7cc
vulkan/android: Add rp_attachment_has_external_format helper
...
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37177 >
2025-10-09 18:42:13 +00:00
Lucas Fryzek
bbcafa630f
anv: Modify anv feature (dis)enable code to match other drivers
...
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37177 >
2025-10-09 18:42:13 +00:00
Lucas Fryzek
1b333251c4
anv: Enable R10X6 & R10X6G10X6 unorm formats
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37177 >
2025-10-09 18:42:13 +00:00
Lucas Fryzek
232f8c42f7
anv: Assert that we only import ahb image with one layer
...
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37177 >
2025-10-09 18:42:13 +00:00
Lucas Fryzek
9493f7781d
vulkan/runtime: Error if ahb has more than one layer
...
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37177 >
2025-10-09 18:42:13 +00:00
Emma Anholt
d01aae2fb1
nir: Add a shader bisect tool.
...
When you're trying to figure out what shader some NIR pass broke, use
nir_shader_bisect_select() to decide between NIR pass behaviors, and then
nir_shader_bisect.py will help you automatically bisect down to which
source_blake3 is at fault. Once it's identified, it prints you a C call
you can use for selecting that shader specifically, which you can use for
continuing on in your debugging.
On a test I was looking at, this took 10 steps to bisect 134 shaders down
to the source_blake3 of the NIR shader in question.
This idea is heavily lifted from Job Noorman's ir3_shader_bisect.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37468 >
2025-10-09 17:56:30 +00:00
Yiwei Zhang
6d2b2963a2
calendar: fix 25.3 branch names
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37796 >
2025-10-09 10:12:05 -07:00
Yiwei Zhang
98a6825d35
panvk: fix to clear FPK with incompatible blend modes
...
When there's only blend mode updates (e.g. CB_BLEND_EQUATIONS not
covered by fs_user_dirty check), we have to set dcd0_dirty for the
relevant CB updates. Otherwise, we might miss to clear FPK. On the
other hand, this also optimizes to set FPK in the reverse mutation, so
that new draws no longer depending on the previous tile buffer can
benefit from FPK.
Cc: mesa-stable
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37760 >
2025-10-09 16:22:35 +00:00
Romaric Jodin
c8b10b4512
meson: add vk_enum_defines.h to idep_vulkan_util_headers
...
Adding vk_enum_defines.h to idep_vulkan_util_headers to help
ninja-to-soong generate correct rules for the Android build system.
Without it, ninja-to-soong is not able to figure out that this file is
needed by targets depending on idep_vulkan_util_headers, leading to
build errors with the file missing.
Ref #14072
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37789 >
2025-10-09 14:47:11 +00:00
Alyssa Rosenzweig
ee671cf4f7
intel/nir_blockify_uniform_loads: use helpers
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com >
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37753 >
2025-10-09 09:50:20 -04:00
Alyssa Rosenzweig
6b006db492
brw/nir_lower_storage_image: use helper
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com >
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37753 >
2025-10-09 09:50:20 -04:00
Alyssa Rosenzweig
e3b6440b39
brw/nir_lower_shader_calls: use helpers
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com >
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37753 >
2025-10-09 09:50:20 -04:00
Alyssa Rosenzweig
ec8ed69131
brw/nir_lower_sample_index_in_coord: use helpers
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com >
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37753 >
2025-10-09 09:50:20 -04:00
Alyssa Rosenzweig
544a739abc
brw/nir_lower_fs_barycentrics: avoid nir_def_rewrite_uses_after
...
replace is preferred when appropriate & should be faster. after is when
you use the result in your lowering itself.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com >
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37753 >
2025-10-09 09:50:19 -04:00
Alyssa Rosenzweig
4fe8c19862
brw/nir_lower_alpha_to_coverage: eliminate goto
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com >
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37753 >
2025-10-09 09:50:19 -04:00
Danylo Piliaiev
02138d96fd
tu: Prevent GPU hang with occlusion query + certain depth state
...
This state combination wedges something in GPU causing hang.
Forcing A6XX_LATE_Z prevents it. Prop driver does the same.
CC: mesa-stable
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37765 >
2025-10-09 13:12:20 +00:00
Alyssa Rosenzweig
c1d75c6e51
treewide: use BITSET_CALLOC
...
Via Coccinelle patch:
@@
expression count;
type T;
@@
-calloc(BITSET_WORDS(count), sizeof(T))
+BITSET_CALLOC(count)
@@
expression count;
type T;
@@
-calloc(sizeof(T), BITSET_WORDS(count))
+BITSET_CALLOC(count)
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37779 >
2025-10-09 12:29:55 +00:00
Alyssa Rosenzweig
85207a4f6a
util: add BITSET_CALLOC helper
...
comes up a bunch.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37779 >
2025-10-09 12:29:55 +00:00
Sergi Blanch Torne
3d444619e0
ci,marge_queue: introduce testing
...
This script didn't have tests defined. Now, the objects on this tool have
tests to verify its functionality, as well as the core method called to do
all the processes to provide a sorted list of the marge queue.
Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37395 >
2025-10-09 12:12:42 +00:00
Sergi Blanch Torne
50c4ec0620
ci,marge_queue: use rich module
...
As proposed in !37454 , we can benefit from `rich` python module to simplify
output formatting. Using it here it's only the link print in console what
needs to be adjusted. There is a side effect, that look ok, with some
coloring in the timestamps and MR ids listed.
Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37395 >
2025-10-09 12:12:42 +00:00
Sergi Blanch Torne
1d38792d62
ci,marge_queue: handle GitLab auth exception
...
Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37395 >
2025-10-09 12:12:42 +00:00
Sergi Blanch Torne
c2763a1992
docs,marge_queue: document the tool usage
...
This marge_tool wasn't yet described in the documentation. It has links to the
resource utilization, and it is a satellite tool for crnm.
Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37395 >
2025-10-09 12:12:41 +00:00
Sergi Blanch Torne
f41dcfcec7
ci,marge_queue: queue element formatting
...
The output line with the MR link only works in some consoles; it can be
interesting for some developers to have visibility of the MR id.
It can be useful, too, to have some sort of a header showing the fields
printed from each merge request in the queue.
Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37395 >
2025-10-09 12:12:41 +00:00
Sergi Blanch Torne
b80a93dac0
ci,marge_queue: encapsulate GitLab module queries
...
For testing and an eventual use of tenacity, it is practical to encapsulate
calls to the GitLab module in methods.
Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37395 >
2025-10-09 12:12:41 +00:00
Sergi Blanch Torne
e2acf0934b
ci,marge_queue: protect form transient errors
...
Use the parameter retry_transient_errors on the GitLab object creation to
protect the script from transient errors that can be well handled.
Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37395 >
2025-10-09 12:12:41 +00:00
Sergi Blanch Torne
b0ea4d36ff
ci,marge_queue: refactor the get queue method
...
Rebuild the information gathering about the marge queue and how the
information is later prompted to the user.
The queue provided to the user is sorted, so the user knows what will be
merged first (when the corresponding merge request pipeline succeeds).
Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37395 >
2025-10-09 12:12:40 +00:00
Sergi Blanch Torne
bf5626c82f
ci,marge_queue: objects to represent the queue
...
Enhancement of the module with two structures that can encapsulate
functionalities and establish links between data collected.
Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37395 >
2025-10-09 12:12:39 +00:00
Sergi Blanch Torne
02af2a199b
ci,marge_queue: enhance script interruption
...
Instead of printing an exception on the screen when the process is interrupted
from the keyboard, handle it and print a more friendly message.
Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37395 >
2025-10-09 12:12:39 +00:00
Sergi Blanch Torne
915648f994
ci,marge_queue: encapsulate monitor loop
...
Encapsulate the procedure in a method that can be imported from another tool
or even a python console.
Also include a typehint fix.
Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37395 >
2025-10-09 12:12:39 +00:00
Karmjit Mahil
bb5f160dae
freedreno/decode: Add 2d_to_json lua script
...
Signed-off-by: Karmjit Mahil <karmjit.mahil@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37677 >
2025-10-09 10:02:30 +00:00
Valentine Burley
f3951ec496
ci: Disable broken MR check in sanity job
...
GitLab recently changed the required permissions for the
are-developers-allowed-to-push-to-my-MR check:
https://gitlab.freedesktop.org/freedesktop/ci-templates/-/issues/81
Until that’s resolved, disable the check - it’s mostly obsolete anyway.
Signed-off-by: Valentine Burley <valentine.burley@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37782 >
2025-10-09 09:05:56 +00:00
Kenneth Graunke
73cbb35442
brw: Move into a new src/intel/compiler/brw subdirectory
...
This keeps the directory structure a bit more organized:
- brw specific code
- elk specific code
- common NIR passes that could be used in both places
It also means that you can now 'git grep' in the brw directory without
finding a bunch of elk code, or having to "grep thing b*".
Reviewed-by: Dylan Baker <dylan.c.baker@intel.com >
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37755 >
2025-10-09 07:01:47 +00:00
Kenneth Graunke
d1b0597213
brw: Drop compiler/ from brw includes
...
They're in the current directory/module, just include them.
Reviewed-by: Dylan Baker <dylan.c.baker@intel.com >
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37755 >
2025-10-09 07:01:46 +00:00
Kenneth Graunke
af93215b7a
intel: Re-unify brw_prim.h and elk_prim.h
...
These are identical and are just hardware enum values, not related to
the structure of the backend compiler.
Reviewed-by: Dylan Baker <dylan.c.baker@intel.com >
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37755 >
2025-10-09 07:01:46 +00:00
Kenneth Graunke
d4c8ca43ef
intel: Make a libintel_compiler_nir internal static library
...
We were compiling these twice, one for brw, one for elk. There's no
reason to do that, just compile the common code once and link against it
in both backends.
Reviewed-by: Dylan Baker <dylan.c.baker@intel.com >
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37755 >
2025-10-09 07:01:46 +00:00
Kenneth Graunke
86aa241c66
brw: Rename brw_nir_trig build target to brw_nir_workarounds
...
Matches the recent file rename.
Reviewed-by: Dylan Baker <dylan.c.baker@intel.com >
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37755 >
2025-10-09 07:01:46 +00:00
Kenneth Graunke
b15b83f43f
brw: Drop ir_expression_operation_h from build system
...
This is from the pre-NIR era where we used GLSL IR expression opcodes
directly. We haven't done that in years.
Reviewed-by: Dylan Baker <dylan.c.baker@intel.com >
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37755 >
2025-10-09 07:01:46 +00:00
Kenneth Graunke
a7c2b87874
intel: Move intel_shader_reloc to common code and drop elk_shader_reloc
...
We want to be able to emit load_reloc_const_intel intrinsics from common
NIR passes (such as printf lowering). In order to do that, we need to
have the enum with the meaning of values in common code. Once you have
that, it's easy to see the (identical) data structures as a way for the
driver to communicate about relocations, rather than a compiler backend
specific thing. So we move it all up to common code, and re-unify.
Reviewed-by: Dylan Baker <dylan.c.baker@intel.com >
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37755 >
2025-10-09 07:01:46 +00:00
Kenneth Graunke
116c65cd3d
brw: Rename brw_shader_reloc to intel_shader_reloc
...
In preparation for moving out of brw to common code.
Reviewed-by: Dylan Baker <dylan.c.baker@intel.com >
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37755 >
2025-10-09 07:01:46 +00:00
Kenneth Graunke
b458140b75
elk: Delete ELK_SHADER_RELOC_DESCRIPTORS_ADDR_HIGH
...
This is leftover brw code that nobody uses.
Reviewed-by: Dylan Baker <dylan.c.baker@intel.com >
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37755 >
2025-10-09 07:01:46 +00:00
Rob Clark
f448ad3adf
freedreno/layout: gen8 descriptor support
...
Add support to build gen8 descriptors. The parameters/logic is largely
the same as a6xx/a7xx, but the layout is reshuffled.
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37727 >
2025-10-09 02:23:32 +00:00
Rob Clark
ed6f0b982b
freedreno/layout: Convert fd6_view to c++
...
The descriptor format changes for gen8, so we'll want a template param
to control which descriptors we build.
This also lets us drop the chip arg from fdl_view_args.
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37727 >
2025-10-09 02:23:32 +00:00
Rob Clark
344486d583
freedreno/a6xx: Slight re-org of sampler descriptor building
...
A bit of re-org to make it easier to slot in the gen8 case.
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37727 >
2025-10-09 02:23:32 +00:00
Rob Clark
6195826826
freedreno/registers: pm4 updates for gen8
...
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37727 >
2025-10-09 02:23:32 +00:00
Rob Clark
8a68c6684b
freedreno/registers: Add gen8 descriptor layout
...
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37727 >
2025-10-09 02:23:32 +00:00
Rob Clark
1d2895b232
freedreno/registers: Add gen8 regs
...
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37727 >
2025-10-09 02:23:32 +00:00
Rob Clark
8edd6eb42e
freedreno/registers: Common-ize PIPE definitions
...
PIPE enum definitions are backward compatible. So move its definition
to adreno_common.xml.
Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com >
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37727 >
2025-10-09 02:23:31 +00:00
Rob Clark
6959bd9f54
freedreno/decode: Move enum lookup out of snapshot
...
Some of these enums change between gens, which will be easier to deal
with if we move them out of the snapshot serialization helpers.
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37727 >
2025-10-09 02:23:31 +00:00