All UAVs which can be accessed via pointer need to be grouped together
starting at base 0, because nir_to_dxil emits the globals array from
[0, size], where size is the input number of globals, as well as one
for each SSBO. Images need to come after that.
Theoretically, nir_to_dxil could emit 3 arrays:
1. Globals
2. Constants
3. Printf
But constants get converted to globals early on so that'd be pretty
tricky to actually detangle.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26803>
When a kernel input is a pointer to global or constant memory, it's expected
that the invoker provides the pointer value in the form of
(buffer_index << 32) | offset. The buffer index, however, is statically
knowable in the compiler, as long as a buffer is bound. Since it's
undefined behavior to dereference the pointer with no buffer bound,
we can replace any deref chain that terminates in an access with one
that uses a constant buffer index.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26803>
These handles can be emitted in control flow, which means that the handle
might be in a block which does not dominate a block that's processed
later on, which results in incorrect DXIL if we try to reference it.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26803>
Flip on the caps/extensions, use their presence to turn on bindless just like
descriptor_indexing, use the buffer flag to indicate UAV access, and fix up
the getter to return the kind of data we want.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28028>
This works similarly to the CL compiler, where a 64-bit address is
decomposed into a 32-bit index and offset. But unlike CL, where the
index is into a per-kernel array of bound buffers, for Vulkan it points
into the global device-wide descriptor heap.
For all global deref chains that terminate in a load/store/atomic, create
a parallel deref chain that begins by decomposing the pointer to a vec2,
followed by a load_vulkan_descriptor, and then an SSBO deref chain. Any instance
where the original deref chain was used for something else will remain as
global derefs, so also run lower_explicit_io for global to produce appropriate
pointer math.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28028>
HLSL docs say WaveReadLaneAt is undefined if the target lane is inactive. This makes
sense since the target lane may need to *send* the data, rather than it being pulled
by the calling lane. So don't early-out on the loop, iterate through the whole wave
on all threads and read the cross-lane data before branching.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27624>
Apparently spiregg can produce not-taken branches that somehow try
to access textures that aren't actually declared. These branches
need to be trimmed before any texture lowering is done.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27531>
Some hardware that doesn't support true static samplers, emulates it
by copying all static samplers into a reserved portion of every descriptor
heap. To support Vulkan's required 4000 live sampler limit in bindless
mode, D3D is now able to create descriptor heaps which do not have a reserved
portion. Any descriptor heaps above the MaxSamplerDescriptorHeapSizeWithStaticSamplers
limit will not have that reserved portion and cannot be used with static samplers.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27348>
DXIL doesn't have instruction-level coherency. We have 3 options:
1. Promote the instruction to an atomic instruction. We can only do this
for 32-bit or 64-bit ops.
2. If using bindless, declare the local resource declaration as globally-coherent.
3. If not using bindless, add globally-coherent to the global resource declaration.
This pass does all 3 of these, stopping at the intrinsic level for supported types
of atomics, otherwise assigning to the global resource declaration, which will be
unused if we're doing bindless, where instead we'll get it from the instruction.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27348>
I was under the impression these would never be needed, since the source
should already be in the right GENERIC_READ layout, but when resolving
rendering attachments with a blit, the source is still in the layout that
it was in at the end of rendering.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27313>
Not all D3D hardware supports specifying the stencil ref value from the
pixel shader. For such hardware, stencil blits need to do the awful
8-pass one-bit-per-pass discard-to-not-write blit approach.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27313>
