David Heidelberg
dfd96fac41
ci/freedreno: add another a530 flakes
...
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24079 >
2023-07-16 02:11:24 +02:00
David Heidelberg
f952756d1e
ci/freedreno: fix unexpectedpass flake on a630
...
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24079 >
2023-07-16 02:11:24 +02:00
David Heidelberg
5b3cccaf63
ci/lima: EGL testing was disabled when fp16 fail was removed
...
fd4d0e1cc2 ("st/mesa: Set gl_config.floatMode based on color_format"),
fixed this functionality across multiple drivers, but EGL testing on
Mali was disabled back then, theofore it still fails here.
Acked-by: Guilherme Gallo <guilherme.gallo@collabora.com >
Acked-by: Erico Nunes <nunes.erico@gmail.com >
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24079 >
2023-07-16 02:11:24 +02:00
David Heidelberg
87439a8c71
ci/radeonsi: stoney arb_timer_query got fixed between kernel 6.3.1..13
...
Acked-by: Guilherme Gallo <guilherme.gallo@collabora.com >
Acked-by: Erico Nunes <nunes.erico@gmail.com >
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24079 >
2023-07-16 02:11:23 +02:00
David Heidelberg
d3f26cbbe1
Revert "lima/ci: temporarily disable deqp-egl tests due to timeouts"
...
This reverts commit be2619766b .
Acked-by: Guilherme Gallo <guilherme.gallo@collabora.com >
Acked-by: Erico Nunes <nunes.erico@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24079 >
2023-07-16 02:11:23 +02:00
David Heidelberg
c467d760cb
ci/freedreno: add fails introduced by upreving to 6.3.13
...
Some of these fails/crashes was already present when trying 6.3.4,
two disappeared, one new crash appeared. Identical `.config`.
See: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9247
Acked-by: Guilherme Gallo <guilherme.gallo@collabora.com >
Acked-by: Erico Nunes <nunes.erico@gmail.com >
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24079 >
2023-07-16 02:11:23 +02:00
David Heidelberg
bd2b31a89c
ci: update kernel to 6.3.13
...
Acked-by: Guilherme Gallo <guilherme.gallo@collabora.com >
Acked-by: Erico Nunes <nunes.erico@gmail.com >
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24079 >
2023-07-16 02:11:23 +02:00
David Heidelberg
23158e9a3f
ci: build kernel in gfx-ci/linux and just use binaries in Mesa3D CI
...
This bring visible speedup while preparing the rootfs and containers.
Acked-by: Guilherme Gallo <guilherme.gallo@collabora.com >
Acked-by: Erico Nunes <nunes.erico@gmail.com >
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24079 >
2023-07-16 02:11:23 +02:00
Alyssa Rosenzweig
9bcdc45ee7
nir: Devendor load_sample_mask
...
AGX will use this too for its MSAA lowerings.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24148 >
2023-07-15 19:48:30 +00:00
Alyssa Rosenzweig
56d61d9a64
nir: Add fence_{pbe,mem}_to_tex(_pixel)_agx intrinsics
...
Read-after-write hazards require special handling on AGX, since image loads are
implemented with texturing. Add intrinsics to handle these hazards.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24148 >
2023-07-15 19:48:30 +00:00
Faith Ekstrand
259ba104f7
nv50/ir: Support vector movs
...
nir_opt_mov and nir_op_vecN are only the same if the mov is only a
single component. Otherwise the vec loop will try to access src[c]
where c > 0 which breaks for nir_op_mov. It's uncommon but scalar
back-ends can see vector movs so we need to handle this correctly.
Fixes: 6513c675ad ("nv50/ir/nir: implement nir_alu_instr handling")
Reviewed-by: Karol Herbst <kherbst@redhat.com >
Reviewed-by: M Henning <drawoc@darkrefraction.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24167 >
2023-07-15 15:53:40 +00:00
Semjon Kravtsenko
3982445728
glx: Assign unique serial number to GLXBadFBConfig error
...
Fixes: e89e1f5049 ("glx: Fix error handling yet again in CreateContextAttribs")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9171
Tested-by: yan12125
Co-authored-by: XRevan86
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23762 >
2023-07-15 03:27:17 +00:00
WinLinux1028
9590bce3e2
radeonsi: prefix function with si_ to prevent name collision
...
Fixed a build error caused by multiple gfx11_init_query symbols when building with iris and radeonsi specified in gallium-drivers.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9238
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24045 >
2023-07-14 22:37:05 +00:00
Sagar Ghuge
27d30fe3c0
isl: Disable MCS compression just on ACM platform
...
We're still seeing failures with render target reads of multisampled
images on Alchemist platforms, but Meteorlake doesn't appear to have
that issue. Enable MCS on Meteorlake.
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22802 >
2023-07-14 21:17:19 +00:00
Sagar Ghuge
efa6594536
intel/compiler: Look at 2 register worth of data instead of 4
...
Sampler always writes 4/8 register worth of data but for ld_mcs only
valid data is in first two register. So with 16-bit payload, we need to
split 2-32bit registers into 4-16-bit payload.
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22802 >
2023-07-14 21:17:19 +00:00
Rohan Garg
8b93fa149b
iris: migrate WA 14016118574 to use the WA framework
...
Fixes: 58829d9f1 ("iris: implement Wa_14016118574")
Signed-off-by: Rohan Garg <rohan.garg@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24156 >
2023-07-14 21:29:28 +02:00
Rohan Garg
83716b08cf
iris: migrate WA 14013910100 to use the WA framework
...
Fixes: eeb3f4594d ("intel/xehp: Implement XeHP workaround Wa_14013910100.")
Signed-off-by: Rohan Garg <rohan.garg@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24156 >
2023-07-14 21:29:27 +02:00
Thong Thai
e85a18a9af
Update radeon_vcn_enc.c
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24151 >
2023-07-14 17:46:03 +00:00
Thong Thai
64eab1f3ae
radeonsi: enable vcn encoder rgb input support
...
v2: use luma pitch when chroma not available (Ruijing)
Signed-off-by: Thong Thai <thong.thai@amd.com >
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24151 >
2023-07-14 17:46:02 +00:00
Marek Olšák
043dcfad04
Revert "ac/nir/ngg: Follow intrinsic sources when analyzing before culling."
...
This reverts commit 411f69b9c5 .
It broke tessellation in Unigine Heaven with radeonsi.
Fixes: 411f69b9c5 - ac/nir/ngg: Follow intrinsic sources when analyzing before culling.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24160 >
2023-07-14 12:00:44 -04:00
David Rosca
d408ae88db
radeonsi: Use DIV_ROUND_UP instead of ALIGN_POT
...
DIV_ROUND_UP is the correct replacement for ALIGN_TO.
Fixes: ba83c1e2
Signed-off-by: David Rosca <nowrep@gmail.com >
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com >
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24127 >
2023-07-14 14:38:20 +00:00
Lucas Stach
6d312c6160
etnaviv: optimize transfers when whole resource level is discarded
...
Now that all our age tracking is moved to etna_resource_level we can unlock
some more optimizations in the transfers by skipping copies or flushes when
the whole level is discarded.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de >
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19964 >
2023-07-14 14:21:35 +00:00
Lucas Stach
f8f0f1c5cb
etnaviv: optimize render resource update
...
Now that we track the age at the resource level we can optimize
the render surface update by only copying the single level we are
going to render to.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de >
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19964 >
2023-07-14 14:21:35 +00:00
Lucas Stach
61e27debf5
etnaviv: keep blit destination tile status valid if possible
...
If the blit was just a resource flush on a uncompressed buffer we can
keep the tile status as valid, as in that case only clear tiles are filled
in the target buffer, but it doesn't hurt to look at the TS buffer when
fetching from this resource as the tile status matches the content of the
buffer. For compressed formats we can't do the same, as the compressed
tiles are uncompressed when flushing the resource, so the compression tags
don't match the buffer content anymore.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de >
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19964 >
2023-07-14 14:21:35 +00:00
Lucas Stach
dce4aa83e4
etnaviv: allow sampler TS even if the resource is flushed
...
As long as the TS is valid we can use the tile status to optimize the
sample fetch, even if the resource has been flushed for any reason.
Do the check for valid TS first when checking whether to enable sampler
TS to avoid all the other checks when TS isn't usable.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de >
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19964 >
2023-07-14 14:21:35 +00:00
Lucas Stach
fdedc0b3b3
etnaviv: optimize sampler source update
...
Now that we track age at the resource level we can optimize
the sampler source update by only copying/flushing the levels
that are actually used by the sampler.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de >
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19964 >
2023-07-14 14:21:35 +00:00
Lucas Stach
995e34840f
etnaviv: add tile status buffer status into TS metadata
...
When the TS is shared all sharing instances must see the same status
information about the resource TS buffer. Add this information to the
shared TS metadata and make it take precedence over the internal
status tracking when the TS is shared.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de >
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19964 >
2023-07-14 14:21:35 +00:00
Lucas Stach
49d2f9f918
etnaviv: move TS meta into etna_resource_level
...
Handle imports/exports always deal with one specific level of
a resource, so the shared TS metadata should also be per level.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de >
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19964 >
2023-07-14 14:21:35 +00:00
Lucas Stach
97aec88c79
etnaviv: add helper to set TS validity
...
Wrap the setting of the resource level TS validity into a
helper function to allow the implementation to change later.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de >
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19964 >
2023-07-14 14:21:35 +00:00
Lucas Stach
0f2df7d361
etnaviv: add helper to get TS validity
...
Add a small helper to get the validity of the TS buffer for
a resource level. We can drop the ts_size check in several
places, as we never set ts_valid to true if there is no TS
buffer.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de >
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19964 >
2023-07-14 14:21:35 +00:00
Lucas Stach
f9af3b368a
etnaviv: add helper to transfer resource level age to another
...
Add a small helper to transfer the age (seqno) from one resource level
to another.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de >
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19964 >
2023-07-14 14:21:35 +00:00
Lucas Stach
2d2d0e803d
etnaviv: add helper to mark resource level as changed
...
Add a small helper to mark a resource level as changed so the
seqno handling is hidden.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de >
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19964 >
2023-07-14 14:21:35 +00:00
Lucas Stach
99daab8bf0
etnaviv: add helper to mark resource level as flushed
...
Add a small helper to mark a resource level as flushed so the
seqno handling is hidden.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de >
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19964 >
2023-07-14 14:21:35 +00:00
Lucas Stach
83a05447c5
etnaviv: optimize resource copies by skipping clean levels
...
If we sync/flush a full resource we can skip any level where the
target is of the same age as the source.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de >
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19964 >
2023-07-14 14:21:35 +00:00
Lucas Stach
87021531a3
etnaviv: flush destination before executing blit
...
A blit into a render target may destroy valid TS information, as the
destination TS isn't updated. Flush the blit destination when necessary
to make sure that all pending TS is resolved into the destination before
the blit is executed.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de >
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19964 >
2023-07-14 14:21:35 +00:00
Lucas Stach
ff3741eee1
etnaviv: move resource seqnos to level
...
Resource maps, blits and surfaces all target a specific level of a
resource, so they can have different ages. Move the seqnos tracking
the age to etna_resource_level.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de >
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19964 >
2023-07-14 14:21:35 +00:00
Lucas Stach
73c1eb50dc
ci/etnaviv: update ci expectation
...
Etnaviv fails in the same way as Lima after the merge of
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23735
Signed-off-by: Lucas Stach <l.stach@pengutronix.de >
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24157 >
2023-07-14 14:04:49 +00:00
Alyssa Rosenzweig
1e9f4b967a
ir3: Convert to register intrinsics
...
Thanks to our SSA-based RA, we only use nir_register for arrays, and we only
access array registers with dedicated moves anyway. So there's no reason to need
any fancy coalescing... we can just switch to register access intrinsics and
translate them to moves exactly like we would've done when getting srcs/dests
before.
This addresses the ir3 portion of #9051 .
No shader-db changes with a (significant subset of) Rob's shader-db. (Some
shaders are affected by this change but not in any way that shows up in the
stats.)
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Connor Abbott <cwabbott0@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24126 >
2023-07-14 09:28:48 -04:00
Timur Kristóf
7ad9416c61
ac/llvm: Remove subgroup_id and num_subgroups intrinsics.
...
We expect that these will be lowered in NIR now.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24005 >
2023-07-14 12:17:24 +00:00
Timur Kristóf
9fb9e54d69
aco: Remove subgroup_id and num_subgroups intrinsics.
...
These are lowered in NIR now.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24005 >
2023-07-14 12:17:24 +00:00
Timur Kristóf
2468874bf0
radeonsi: Use ac_nir_lower_intrinsics_to_args.
...
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24005 >
2023-07-14 12:17:24 +00:00
Timur Kristóf
7000cd8362
radeonsi: Move si_select_hw_stage to si_shader_info.
...
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24005 >
2023-07-14 12:17:24 +00:00
Timur Kristóf
9bade0205a
radv: Use ac_nir_lower_intrinsics_to_args.
...
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24005 >
2023-07-14 12:17:24 +00:00
Timur Kristóf
6551be9c6e
radv: Move radv_select_hw_stage to radv_shader_info.
...
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24005 >
2023-07-14 12:17:24 +00:00
Timur Kristóf
5825e20dbf
ac/nir: Add new pass to lower intrinsics to shader args.
...
This is beneficial for intrinsics that do an algebraic
instruction such as bitfield extract on shader arguments,
because it allows NIR to be aware of these instructions and
optimize them together with other algebraic instructions in
the shader.
Currently, just handle subgroup_id and num_subgroups intrinsics.
More will be added here in the future.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24005 >
2023-07-14 12:17:24 +00:00
Timur Kristóf
a7f2d821ec
ac/nir: Simplify arg unpacking when shift is zero.
...
This is so we can just use the same function when it's zero.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24005 >
2023-07-14 12:17:24 +00:00
Timur Kristóf
dc3bbd351a
aco: Fix subgroup_id intrinsic on GFX10.3+.
...
Change this to match how it works in the LLVM backend.
Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24005 >
2023-07-14 12:17:24 +00:00
Karmjit Mahil
3798f99c46
pvr: Submit PR commands
...
This commit adds a partial render command to job submission.
For geom only jobs we must always submit a pr command in case we
enter SPM. For now, for geom+frag jobs, we'll also always submit
a pr command event.
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com >
Reviewed-by: Frank Binns <frank.binns@imgtec.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24138 >
2023-07-14 10:45:49 +00:00
Karmjit Mahil
3c9d1a6cfa
pvr: Restructure rogue_kmd_stream.xml
...
Now things are structured in sections, like the other xml files.
And elements within a section are sorted alphabetically.
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com >
Reviewed-by: Frank Binns <frank.binns@imgtec.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24138 >
2023-07-14 10:45:49 +00:00
Karmjit Mahil
87e7f6abbe
pvr: Remove some magic numbers and increments from km stream
...
- Update and add csbgen definitions to make the content of the
geom and frag km stream more obvious.
- Replace some of the hard coded constants with defines.
- Adds some static assert to make the provenance of definitions
more clear as well as making sure things fit properly.
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com >
Reviewed-by: Frank Binns <frank.binns@imgtec.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24138 >
2023-07-14 10:45:49 +00:00