Without deferred flushes, we would track the last_fence any time when
there had be no rendering/etc since the last flush, to avoid creating
empty batches simply for the purpose of getting a fence. We can do the
same thing with deferred flushes, where the fence is created from the
frontend thread before we know what will be flushed, by repopulating
the pre-created fence.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10444>
We only need fences for batches flushed via pctx->flush(). This will
serve as a useful signal about submits that can be merged.
v2. disable this optimization pre-a6xx until I can debug issues that
submit merging exposes
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10444>
Add a per-fd_pipe fence "timeline" so we can detect cases where we don't
need to call into the kernel to determine if a fd_bo is still busy.
This reuses table_lock, rather than introducing a per-bo lock to protect
fence state updates because (a) the common / hotpath pattern is to
update fences on a lot of objects, but checking the fence state of a
single object is less common, and (b) because we already hold the table
lock in common spots where we need to check the bo's fence state (ie.
allocations from the bo-cache).
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10444>
There are a couple cases where we want to use _NOSYNC, but at the same
time we want to ensure that rendering related to a bo is actually
flushed.
This doesn't do anything yet, but when we start deferring/merging
submits we'll need a way to trigger anything deferred to flush.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10444>
Most of them were actually unused. The memory type (KMEM vs SMI) only
applied to very old a2xx era devices that had a small/fast stacked
memory (SMI) vs normal memory (KMEM). And the cache flags are ignored
(ie. everything is writecombine), but we can add new cache flags later
when they actually do something.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10444>
Before we can fix big endian, we kind of have to agree on how pixel data
should be laid out in memory.
For this we have to use packed data for !is_array declared formats and per
element values for is_array ones.
Also we need proper PACKED_1xn definitions for BE.
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7776>
There is no point in having a write to an attachment enabled when there
is no corresponding output in the shader. Per VK spec it is an UB,
however a few apps depend on attachment not being changed if FS doesn't
have corresponding output.
Fixes water in Genshin Impact.
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10489>
The idea behind this assert is that if a buffer is in
bufmgr->handle_table it's because it has been shared from i965 to the
outside. This is when we add the drm FD associated to this BO to
bo->exports.
But we also import buffer from the outside into i965 and those buffers
don't have an associated drm FD added to bo->exports.
If you import the same buffer more than once, you'll run into this
assert.
v2: Also drop assert from brw_bo_gem_create_from_name() (Ian)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 57e4d0aa1c ("i965: fix export of GEM handles")
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10386>
For GL, we've previously mostly ignored the binding property for sampler variables
during the shader compilation step. For CL, our image bindings were always 0-based as well.
Now, for Vulkan, we are going to be getting explicit bindings and need to emit DXIL that
respects those bindings. Since Vulkan can also have both split and combined images and samplers,
we now need to be smarter about recognizing when NIR is trying to use a "sampler" as *both* an
image and sampler (in deref mode, the same variable will be deref'd as both image and sampler).
That "being smarter" bit comes next, but first, let's prep GL for building correct root
signatures and binding the resources correctly.
Reviewed-By: Bill Kristiansen <billkris@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10298>
