dc247e5d43
radv: remove VK_AMD_shader_info support
...
This extension is quite old and useless now.
VK_KHR_pipeline_executable_properties should be used instead.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15299 >
2022-03-15 19:23:53 +00:00
a0ccc46969
radv: Expose VK_VALVE_descriptor_set_host_mapping for vkd3d only.
...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15363 >
2022-03-15 18:52:41 +00:00
86a7b5e276
radv: Implement VK_VALVE_descriptor_set_host_mapping.
...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15363 >
2022-03-15 18:52:41 +00:00
1dfee91fdf
radv: export the pipeline hash via VK_KHR_pipeline_executable_properties
...
This will help to match RGP<->Fossilize pipelines.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15279 >
2022-03-14 20:20:40 +00:00
c4cf92cad7
radv,aco,ac/llvm: fix indirect dispatches on the compute queue on GFX7-10
...
Since neither PKT3_LOAD_SH_REG_INDEX nor PKT3_COPY_DATA work with compute
queues on GFX7-10, we have to load the dispatch size from memory in the
shader.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15064 >
2022-03-14 19:54:36 +00:00
b003a101ee
radv: stop zeroing radv_sample_locations_state in barriers
...
This is useless because all fields should be correctly filled if the
pNext struct is found.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15164 >
2022-03-14 12:45:29 +00:00
612a12a42c
radv: move waiting for events to CmdWaitEvents2KHR()
...
CmdPipelineBarrier doesn't have events.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15164 >
2022-03-14 12:45:29 +00:00
c6d776f092
radv: remove unnecessary check in FreeCommandBuffers()
...
cmd_buffer->pool should never be NULL. Even if AllocateCommandBuffers()
fails, the successfully created cmdbuffers would have it set correctly.
From the Vulkan spec:
"VUID-vkFreeCommandBuffers-pCommandBuffers-parent
Each element of pCommandBuffers that is a valid handle must have
been created, allocated, or retrieved from commandPool."
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15164 >
2022-03-14 12:45:29 +00:00
01ec899083
radv: remove unnecessary NULL check in TrimCommandPool()
...
This function seems rarely used or maybe never but I noticed this.
From the Vulkan spec:
"VUID-vkTrimCommandPool-commandPool-parameter
commandPool must be a valid VkCommandPool handle".
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15164 >
2022-03-14 12:45:29 +00:00
269b1232ee
radv: remove useless check in radv_cmd_buffer_upload_data()
...
ptr shouldn't be NULL.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15164 >
2022-03-14 12:45:29 +00:00
0eaf9dbce3
radv: fix compatibility with VK_IMAGE_CREATE_EXTENDED_USAGE_BIT
...
Some formats can be accepted if a compatible format is also supported
and VK_IMAGE_CREATE_EXTENDED_USAGE_BIT used.
Fixes new CTS dEQP-VK.image.extended_usage_bit_compatibility.*.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6046
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15063 >
2022-03-14 11:16:33 +00:00
42f84a5886
radv: update inputs_read when lowering the view index
...
Otherwise inputs_read doesn't contain the information. This shouldn't
fix anything in practice because radv_shader_info gathers this from
the variable.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15337 >
2022-03-14 10:26:41 +00:00
d7514c5f04
radv: stop waiting for DMA to be idle for all transfer operations
...
Only copy operations actually use CP DMA.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15194 >
2022-03-14 09:36:28 +00:00
5f3d3be24a
radv: fix indirect dispatches on the compute queue on GFX10.3+
...
For weird reasons, the COPY_DATA packet doesn't seem to copy anything
while on the compute queue. Instead, use PKT3_LOAD_SH_REG_INDEX which
seems to work as expected.
Note that LOAD_SH_REG_INDEX on the compute queue is only supported by
the CP on GFX10.3, so we need to implement a different solution (load
from the indirect BO in the shader) for older generations.
This should fix the Control RT GPU hang.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15053 >
2022-03-14 08:54:23 +00:00
7ad1eb4e8c
radv: rework the CS regalloc hang workaround
...
Move it to the pipeline creation to reduce computations in the hot path.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15162 >
2022-03-14 08:05:32 +01:00
d532da6e96
radv: fix the CS regalloc hang workaround on GFX6 and few GFX7 chips
...
RadeonSI uses a different terminology and info->blocks is actually the
number of threads, not the number of blocks (ie. info->grid).
Found by inspection.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15162 >
2022-03-14 08:05:28 +01:00
6cc4cdaa6f
radv/winsys: add support for queues without user fences.
...
The video queues don't have user fence support.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15257 >
2022-03-14 10:41:04 +10:00
c6755e85e3
radv/winsys: add a ring level detection for ib bo usage.
...
The video rings can't use IB bos
v2: add use_ib flag to avoid a bunch of checks.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15257 >
2022-03-14 10:41:01 +10:00
31b82afe6e
radv/winsys: add nop packets for uvd and vcn dec.
...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15257 >
2022-03-14 10:40:52 +10:00
5819b4c1d3
radv/winsys: complete ring/ip translations.
...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15257 >
2022-03-14 10:40:23 +10:00
16cb957e8b
radv: Enable KHR_ray_query
...
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14565 >
2022-03-13 12:02:05 +01:00
78c84f11a5
radv: Lower ray queries
...
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14565 >
2022-03-13 12:02:05 +01:00
6d2e95db7b
radv: Move common code to seperate file
...
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14565 >
2022-03-13 12:02:05 +01:00
177805cc03
radv: try and fix internal transfer queue mapping
...
The WSI code wants to remain generic and try and use vulkan APIs,
even though these queues aren't exposed through the API.
Add the transfer queue to the end of the queues.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Tested-by: Mike Lothian <mike@fireburn.co.uk >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15357 >
2022-03-13 02:37:19 +00:00
b366fef091
radv: optimize the number of loaded components for VS inputs in NIR
...
fossils-db (Sienna Cichlid):
Totals from 3691 (2.74% of 134913) affected shaders:
VGPRs: 121368 -> 121584 (+0.18%); split: -0.36%, +0.54%
CodeSize: 7597912 -> 7561140 (-0.48%); split: -0.66%, +0.18%
MaxWaves: 104706 -> 104772 (+0.06%)
Instrs: 1441229 -> 1437652 (-0.25%); split: -0.53%, +0.28%
Latency: 5500766 -> 5482101 (-0.34%); split: -0.45%, +0.11%
InvThroughput: 804401 -> 797178 (-0.90%); split: -1.09%, +0.20%
VClause: 25185 -> 25143 (-0.17%); split: -0.50%, +0.33%
SClause: 27486 -> 27445 (-0.15%); split: -0.57%, +0.42%
Copies: 143816 -> 147900 (+2.84%); split: -0.54%, +3.38%
PreSGPRs: 109584 -> 110396 (+0.74%); split: -0.04%, +0.79%
PreVGPRs: 95541 -> 94583 (-1.00%); split: -1.12%, +0.12%
fossils-db (Polaris10):
Totals from 1773 (1.30% of 135960) affected shaders:
SGPRs: 80848 -> 80864 (+0.02%); split: -0.14%, +0.16%
VGPRs: 56424 -> 55600 (-1.46%); split: -1.47%, +0.01%
CodeSize: 1732588 -> 1696840 (-2.06%); split: -2.07%, +0.01%
MaxWaves: 12103 -> 12106 (+0.02%)
Instrs: 347684 -> 341597 (-1.75%); split: -1.76%, +0.01%
Latency: 2542840 -> 2523946 (-0.74%); split: -0.95%, +0.21%
InvThroughput: 924601 -> 905102 (-2.11%); split: -2.13%, +0.02%
VClause: 9565 -> 9545 (-0.21%); split: -0.51%, +0.30%
SClause: 10587 -> 10333 (-2.40%); split: -2.82%, +0.43%
Copies: 19321 -> 20307 (+5.10%); split: -0.78%, +5.88%
PreSGPRs: 30879 -> 30875 (-0.01%); split: -0.20%, +0.18%
PreVGPRs: 41211 -> 41270 (+0.14%); split: -0.73%, +0.87%
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15317 >
2022-03-11 07:40:10 +00:00
1ec4e568de
radv: abstract queue family away from queue family index.
...
If we introduce another queue type (video decode) we can have a
disconnect between the RADV_QUEUE_ enum and the API queue_family_index.
currently the driver has
GENERAL, COMPUTE, TRANSFER which would end up at QFI 0, 1, <nothing>
since we don't create transfer.
Now if I add VDEC we get
GENERAL, COMPUTE, TRANSFER, VDEC at QFI 0, 1, <nothing>, 2
or if you do nocompute
GENERAL, COMPUTE, TRANSFER, VDEC at QFI 0, <nothing>, <nothing>, 1
This means we have to add a remapping table between the API qfi
and the internal qf.
This patches tries to do that, in theory right now it just adds
overhead, but I'd like to exercise these paths.
v2: add radv_queue_ring abstraction, and pass physical device in,
as it makes adding uvd later easier.
v3: rename, and drop one direction as unneeded now, drop queue_family_index
from cmd_buffers.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13687 >
2022-03-11 04:38:55 +00:00
342e6f8332
radv,aco,llvm: lower post shuffle vertex in NIR
...
fossils-db (Sienna Cichlid):
Totals from 774 (0.57% of 134913) affected shaders:
VGPRs: 26496 -> 26312 (-0.69%)
CodeSize: 1825936 -> 1828812 (+0.16%); split: -0.04%, +0.20%
MaxWaves: 22046 -> 22062 (+0.07%)
Instrs: 347634 -> 347975 (+0.10%); split: -0.05%, +0.15%
Latency: 1363949 -> 1356426 (-0.55%); split: -0.59%, +0.04%
InvThroughput: 221529 -> 221380 (-0.07%); split: -0.10%, +0.04%
VClause: 5682 -> 5676 (-0.11%); split: -1.46%, +1.36%
SClause: 7485 -> 7411 (-0.99%); split: -1.48%, +0.49%
Copies: 30481 -> 30420 (-0.20%); split: -0.51%, +0.31%
PreVGPRs: 19717 -> 19656 (-0.31%)
fossil-db (Polaris10):
Totals from 896 (0.66% of 135960) affected shaders:
SGPRs: 49824 -> 49648 (-0.35%); split: -0.39%, +0.03%
VGPRs: 31040 -> 29948 (-3.52%); split: -3.62%, +0.10%
CodeSize: 875960 -> 875920 (-0.00%); split: -0.06%, +0.05%
MaxWaves: 6380 -> 6429 (+0.77%)
Instrs: 171522 -> 171482 (-0.02%); split: -0.07%, +0.05%
Latency: 1356082 -> 1334386 (-1.60%); split: -1.61%, +0.01%
InvThroughput: 553389 -> 552957 (-0.08%); split: -0.08%, +0.00%
VClause: 4317 -> 4244 (-1.69%); split: -2.41%, +0.72%
SClause: 6157 -> 6139 (-0.29%); split: -0.45%, +0.16%
Copies: 9340 -> 9235 (-1.12%); split: -1.24%, +0.12%
PreVGPRs: 22366 -> 22116 (-1.12%)
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15113 >
2022-03-08 19:18:01 +00:00
64acec0ef9
nir: Fix lowering terminology of compute system values: "from"->"to".
...
This is to match other NIR terminology.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15103 >
2022-03-08 17:36:31 +00:00
516aee64cc
radv,aco: do not lower nir_op_pack_{unorm,snorm}_2x16
...
v_cvt_pknorm_{u16,i16}_f32 can be emitted instead, it's supported on
all generations.
No fossils-db changes.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15215 >
2022-03-03 14:54:12 +01:00
feb7e30e2d
radv: include disable_aniso_single_level and adjust_frag_coord_z in key
...
Fixes potential pipeline caching bug.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15175 >
2022-03-02 19:05:28 +00:00
4380916b76
radv: disable DCC for Fable Anniversary, Dragons Dogma, GTA IV and more
...
Also Starcraft 2 and The Force Unleashed II.
These games are known to be affected by the feedback loop issue. We will
fix this properly soon but as a hotfix disabling DCC should be enough.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4424
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15203 >
2022-03-01 16:33:18 +00:00
1e010348ee
radv: remove color exports in presence of holes
...
If there is holes, eg. if only MRT0 and MRT2 are exported, we have to
set MRT1 to SPI_SHADER_32_R to avoid a GPU hang but the export can
still be removed from the fragment shader.
fossils-db (Sienna Cichlid):
Totals from 565 (0.42% of 134913) affected shaders:
VGPRs: 13328 -> 11456 (-14.05%)
CodeSize: 613232 -> 548224 (-10.60%); split: -11.13%, +0.53%
LDS: 284672 -> 296960 (+4.32%)
MaxWaves: 17624 -> 17684 (+0.34%)
Instrs: 113056 -> 100445 (-11.15%); split: -11.68%, +0.53%
Latency: 684327 -> 639348 (-6.57%); split: -7.17%, +0.60%
InvThroughput: 122877 -> 104382 (-15.05%); split: -15.18%, +0.13%
VClause: 2601 -> 2323 (-10.69%); split: -10.77%, +0.08%
SClause: 5629 -> 5443 (-3.30%); split: -3.91%, +0.60%
Copies: 9393 -> 8720 (-7.16%); split: -8.22%, +1.05%
PreSGPRs: 14623 -> 13666 (-6.54%); split: -6.76%, +0.22%
PreVGPRs: 9847 -> 8503 (-13.65%)
fossils-db (Polaris10):
Totals from 565 (0.42% of 135960) affected shaders:
SGPRs: 28064 -> 27104 (-3.42%)
VGPRs: 12516 -> 10544 (-15.76%); split: -15.79%, +0.03%
CodeSize: 516920 -> 456536 (-11.68%); split: -11.68%, +0.00%
MaxWaves: 4369 -> 4418 (+1.12%)
Instrs: 97771 -> 85903 (-12.14%); split: -12.14%, +0.00%
Latency: 767482 -> 708545 (-7.68%); split: -7.97%, +0.29%
InvThroughput: 280017 -> 235744 (-15.81%)
VClause: 2270 -> 2090 (-7.93%); split: -8.50%, +0.57%
SClause: 5185 -> 5012 (-3.34%); split: -3.86%, +0.52%
Copies: 8328 -> 7555 (-9.28%); split: -9.35%, +0.07%
Branches: 1143 -> 1113 (-2.62%)
PreSGPRs: 13816 -> 12725 (-7.90%); split: -7.92%, +0.02%
PreVGPRs: 9707 -> 8270 (-14.80%)
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15108 >
2022-03-01 12:28:47 +01:00
f0398180a5
radv: use MAJOR_IN_SYSMACROS for sysmacros.h include
...
fixes build on OpenBSD
../src/amd/vulkan/radv_device.c:35:10: fatal error: 'sys/sysmacros.h' file not found
Fixes: 7aaa54feb5jsg@jsg.id.au >
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13448 >
2022-02-26 01:00:29 +00:00
53ca85ac2a
radv,drirc: move RADV workarounds to 00-radv-defaults.conf
...
Because we have to maintain two different packages of Mesa, one
specific to RADV and another one for RadeonSI and such, it's a bit
annoying to have to synchronize the drirc entries. Currently, only our
Mesa package installs 00-mesa-defaults.conf which means we have to
backport the drirc RADV changes.
This splits 00-mesa-defaults.conf in two to move the drirc RADV entries
to src/amd/vulkan/00-radv-defaults.conf. Meson will install the file
only if RADV is built.
There is still a caveat for common drirc workarounds like for WSI but
they are rare enough and we could still duplicate them if needed.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15152 >
2022-02-25 15:05:56 +01:00
d2d6eca081
radv: Refactor mesh shader draws and add num_workgroups.
...
Several of the new draw packets need this argument
including all of the taskmesh commands, so it's
best to always declare it.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15034 >
2022-02-25 06:31:33 +00:00
1ee3d49e3e
radv: Better exclude special MS outputs from driver location assignment.
...
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15034 >
2022-02-25 06:31:33 +00:00
a2c1fa9137
radv: initialize extra state for internal pipelines at one place
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14650 >
2022-02-23 22:29:55 +00:00
959e8586aa
radv: remove useless radv_blend_state::single_cb_enable field
...
This was only used for meta operations. DCC/FMASK/FCE pipelines
only declare one color attachment and the color writemask of the
second color attachment is 0 for the HW CB resolve.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14650 >
2022-02-23 22:29:55 +00:00
8347d3dfd7
radv: initialize VGT_GS_OUT_PRIM_TYPE earlier
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14650 >
2022-02-23 22:29:55 +00:00
9fb0831ca1
radv: initialize more depth/stencil states earlier
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14650 >
2022-02-23 22:29:55 +00:00
83ee08f6d1
radv: fix build on BSD
...
Just disable inotify for BDS systems.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6060
Fixes: c50557d961samuel.pitoiset@gmail.com >
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15105 >
2022-02-22 17:16:21 +00:00
197467c238
amd: add a workaround for an SQ perf counter bug
...
Cc: mesa-stable@lists.freedesktop.org
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15098 >
2022-02-22 11:41:04 +00:00
95af3cc2f8
amd: remove the _UMD suffix from register definitions
...
It was mistakenly added to indicate it's for a User-Mode Driver,
but all defined registers in Mesa are.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15098 >
2022-02-22 11:41:04 +00:00
25a37fabb7
vulkan/wsi: untangle buffer-images from prime
...
Not all Vulkan implementations allows rendering to linear images, so in
order to support scanning out from these on Windows we might have to copy
through a buffer like we do in the PRIME path.
To avoid reimplementing the same, let's instead generalize the code a
bit so it doesn't have to specfy any PRIME-specific details.
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12210 >
2022-02-22 10:04:34 +00:00
369b8cffea
radv,aco,llvm: lower adjusting vertex alpha in NIR
...
Instead of duplicating the same lowering in both compiler backends.
This pass will be used to do more VS input lowering.
fossils-db (Polaris10):
Totals from 48 (0.04% of 135960) affected shaders:
VGPRs: 1692 -> 1684 (-0.47%)
CodeSize: 54016 -> 53964 (-0.10%); split: -0.11%, +0.01%
MaxWaves: 339 -> 341 (+0.59%)
Instrs: 11260 -> 11247 (-0.12%); split: -0.13%, +0.02%
Latency: 88165 -> 88113 (-0.06%); split: -0.07%, +0.01%
InvThroughput: 36153 -> 36093 (-0.17%)
Copies: 583 -> 568 (-2.57%)
fossils-db (Pitcairn):
Totals from 43 (0.03% of 135960) affected shaders:
VGPRs: 1548 -> 1552 (+0.26%)
CodeSize: 47900 -> 47820 (-0.17%)
Instrs: 10751 -> 10731 (-0.19%)
Latency: 83029 -> 82873 (-0.19%)
VClause: 168 -> 164 (-2.38%)
SClause: 393 -> 391 (-0.51%)
Copies: 705 -> 685 (-2.84%)
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15076 >
2022-02-22 08:08:42 +00:00
e6853de6b0
radv: set profile_peak when capturing with SQTT
...
Using new CTX OP to set/get stable pstates.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14038 >
2022-02-21 11:16:11 +00:00
5cf4f0cc91
radv/winsys: add support for new CTX OP to set/get stable pstates
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14038 >
2022-02-21 11:16:11 +00:00
294a357b33
panfrost,asahi,radv: Don't set internal=true manually
...
nir_builder_init_simple_shader does this automatically now.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Reviewed-by: Emma Anholt <emma@anholt.net >
Acked-by: Rhys Perry <pendingchaos02@gmail.com >
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14936 >
2022-02-17 23:30:46 +00:00
7ec1d96e5e
nir: Set internal=true in nir_builder_init_simple_shader
...
Matches the expected use by callers. We do need to fix up a few callers which
use this call for external shaders.
v2: Fix up a radv call site (Rhys).
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Reviewed-by: Emma Anholt <emma@anholt.net > [v1]
Acked-by: Rhys Perry <pendingchaos02@gmail.com >
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14936 >
2022-02-17 23:30:46 +00:00
377884c9c8
radv: do not enable per-vertex VRS if the FS uses gl_FragCoord
...
It breaks postprocessing in some games like Ghostrunner, Deathloop,
Street Fighter V.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15042 >
2022-02-16 21:09:12 +00:00
Samuel Pitoiset