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Author SHA1 Message Date
Tomeu Vizoso dae0af20ab teflon: Add support for Reshape operations 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34629>
 2025-07-28 14:14:29 +00:00
Gert Wollny 1420f57ec7 r600/sfn: remove code used for vectorized ALU ops 
Alu is lowered to scalar, so no need to check for vectorized
operations.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36101>
 2025-07-28 13:55:24 +00:00
Gert Wollny c95b86cc0b r600/sfn: remove obsolete index and address register handling 
This old code was needed to get the backend assembler to do the
right thing when emitting index and address registers, but sfn
is handling this now so we can drop this.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36101>
 2025-07-28 13:55:24 +00:00
Gert Wollny 5d0719bf8d r600/sfn: remove some dead code 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36101>
 2025-07-28 13:55:23 +00:00
Gert Wollny 5697e6bb31 r600/sfn: lower ineg in nir 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36101>
 2025-07-28 13:55:23 +00:00
Gert Wollny 43d877ce1a r600/sfn: lower bany/ball *(n)equal in nir 
The code emitted in the backend was not better and often worse
then what we get with the lowering.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36101>
 2025-07-28 13:55:22 +00:00
Erik Faye-Lund 1123987bb3 docs/features: add missing panvk extension 
Mark VK_EXT_robustness2 as supported on pank/v10+, as it's been exposed
for a little while.

Fixes: ef91ad64d5 ("panvk/v10+: Advertise nullDescriptor support")
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36408>
 2025-07-28 12:01:37 +00:00
Erik Faye-Lund 2adcb4c81a pan/ci: remove non-existent flag from PAN_MESA_DEBUG 
There's been a few years since these flags existed, let's drop them.

Fixes: ea03d0652d ("panfrost: Remove PAN_MESA_DEBUG=deqp")
Fixes: 7c7c38b126 ("panfrost: Remove unused debug parameter")
Acked-by: Valentine Burley <valentine.burley@collabora.com>
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36310>
 2025-07-28 11:43:09 +00:00
Erik Faye-Lund fe8f4084cf panvk/ci: try to remove all previously slow tests 
We have an SSA register allocator now that should be a lot faster on
most (if not all) of these tests now. Let's re-enable them to gain more
CI coverage.

Acked-by: Valentine Burley <valentine.burley@collabora.com>
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36310>
 2025-07-28 11:43:09 +00:00
Erik Faye-Lund 5f6b839315 panfrost: add new skips 
These all currently take over 30s, so they should be skipped.

Acked-by: Valentine Burley <valentine.burley@collabora.com>
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36310>
 2025-07-28 11:43:09 +00:00
Patrick Lerda cea80e1a10 dri: complete the support for ARGB4444 
This change is inspired by 1021d6fe62 ("dri: deal
with ARGB1555")

This issue is now mostly fixed with
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36081
Anyway, the dri3_cpp_for_fourcc entry is still missing and should
be added.

This change is useful for instance with r600 which
can handle this format.

Note: this mode was generated at the "glx visuals" level
on r600 by default before the commit d709b42180.

This change was tested on r600 palm and cayman with X11
loaded with a version of mesa generating this very mode:
glx/glx-visuals-depth -pixmap: fail pass
glx/glx-visuals-stencil -pixmap: fail pass

Fixes: 00aa095d53 ("dri: Support 1555/4444 formats")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34294>
 2025-07-28 11:17:00 +00:00
Jose Maria Casanova Crespo 5927fe5430 v3d: Reduce CLE submission of CLIP_WINDOW packets 
When the rasterizer state is updated, we only need to update
the scissoring state if the rasterizer scissor state has changed.

This avoids re-sending the same scissor state any time the rasterizer
is changed.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36352>
 2025-07-28 09:53:56 +00:00
Jose Maria Casanova Crespo 591a894b94 v3d: Mark DIRTY_ZSA if disable_ez is changed from FS. 
We need to update the CFG_BITS packet if the early_fragment_test status
changed vs previous draw call. But we don't need to update it every
time the FS is changed, we only need to update it when disable_ez
value is different from previous FS.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36352>
 2025-07-28 09:53:55 +00:00
Rhys Perry 928c9c618d nir/opt_access: support RT/callable shaders 
I don't know if this affects any real application.

No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35938>
 2025-07-28 09:19:01 +00:00
Rhys Perry a9a1da0264 nir/uub: fix 8/16-bit overflow 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Backport-to: 25.1
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13552
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13553
Tested-by: @LingMan
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36372>
 2025-07-28 08:46:51 +00:00
Danylo Piliaiev fd1e8cf03f tu: Fix nullptr dereference in cmd_buffer tracepoint 
Fixes: ac2046c5b0 ("tu/perfetto: Add app and engine names to the command buffer tracepoint")

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36389>
 2025-07-28 08:27:10 +00:00
Mary Guillemard 525f2972a6 pan/bi: Properly handle SWZ.v4i8 lowering on v11+ 
We were not supporting non replicate swizzle and this trigger an
assertion on fossils/parallel-rdp/small_subgroup.foz.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Fixes: 1481b14fcb ("pan/bi: Lower SWZ.v4i8 to multiple MKVEC.v2i8 on v11+")
Reviewed-by: Olivia Lee <olivia.lee@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36349>
 2025-07-28 08:00:07 +00:00
Job Noorman 294014e196 ir3: use dummy dst for descriptor prefetches 
Now that we have we have the concept of "dummy" registers, we can use it
for descriptor prefetches as well. Currently, they are represented as
having no dst, and a fixup pass during legalization adds the actual
needed dummy dst. This can be prevented by representing their dst using
a dummy register from the start.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36365>
 2025-07-28 09:02:17 +02:00
Job Noorman 1d45e1431f ir3/postsched/legalize: ignore prefetch sam dummy src 
A sam used as descriptor prefetch has a dummy src which is hard-coded
to r48.x. Neither postsched nor legalization are aware this is a dummy
src though, causing false dependencies to be added. This often results
in unnecessary syncs and/or sub-optimal scheduling decisions.

Fix this by adding a "dummy" register flag and teaching postsched and
legalization to ignore registers with that flag set.

Totals from 24681 (15.00% of 164575) affected shaders:
Instrs: 17953856 -> 17953751 (-0.00%); split: -0.00%, +0.00%
CodeSize: 36166530 -> 36163008 (-0.01%); split: -0.09%, +0.08%
NOPs: 3466012 -> 3465943 (-0.00%); split: -0.00%, +0.00%
MOVs: 550649 -> 550613 (-0.01%)
(ss): 460398 -> 460402 (+0.00%)
(ss)-stall: 1780969 -> 1780916 (-0.00%); split: -0.00%, +0.00%
(sy)-stall: 5876641 -> 5876604 (-0.00%); split: -0.00%, +0.00%
Preamble Instrs: 4118242 -> 4087950 (-0.74%); split: -1.13%, +0.39%
Last helper: 7258848 -> 7258837 (-0.00%); split: -0.00%, +0.00%
Cat0: 3795308 -> 3795239 (-0.00%); split: -0.00%, +0.00%
Cat1: 746570 -> 746534 (-0.00%)

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36365>
 2025-07-28 09:02:17 +02:00
Job Noorman fb8d69893c ir3/legalize: add asserts to prevent OOB array access 
When invalid registers are passed to `get_ready_slot`, it may cause an
OOB array access. Instead of running into UB when this happens, catch it
early by asserting.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36365>
 2025-07-28 09:02:17 +02:00
Tomeu Vizoso 453ef73adb teflon: Link to the rocket driver 
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29698>
 2025-07-28 08:06:38 +02:00
Tomeu Vizoso 5ef68894bb pipe-loader: Load the rocket accel driver 
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29698>
 2025-07-28 08:06:38 +02:00
Tomeu Vizoso 5b829658f7 rocket: Initial commit of a driver for Rockchip's NPU 
The programming model matches very closely to that of NVIDIA's NVDLA.

Enough is implemented to run SSDLite MobileDet with roughly the same
performance as the blob (when running on a single NPU core).

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29698>
 2025-07-28 08:06:38 +02:00
Tomeu Vizoso 41eee4c3cc etnaviv/ml: Implement ml_operation_supported() callback 
Choose what operations are supported so Teflon can forward that
information to TensorFlow Lite.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29698>
 2025-07-28 08:06:38 +02:00
Tomeu Vizoso 49bffdd797 teflon: Query drivers on what operations they support 
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29698>
 2025-07-28 08:06:38 +02:00
Tomeu Vizoso 2c2523f0d5 teflon/tests: Increase tolerance 
On Rockchip, we need a tolerance of 8 to pass all tests (especifically
the whole MobileNetV1 model).

Though all other tests pass with a tolerance of just 2, 8 is still not
that high that we would risk letting bugs slip in.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29698>
 2025-07-28 08:06:37 +02:00
Tomeu Vizoso e21d6ee723 pipe-loader: Implement loading of /dev/accel devices 
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29698>
 2025-07-28 08:06:37 +02:00
Tomeu Vizoso 7614122153 teflon: Reformat with clang-format 
And add to .clang-format-include so it hopefully stays clean.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29698>
 2025-07-28 08:06:37 +02:00
Faith Ekstrand 81c6ea9507 nak/lower_tex: Re-order arguments to put can_speculate at the end 
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36396>
 2025-07-26 19:15:30 -04:00
Karol Herbst 8037d22f01 nak: fix wrong argument order in calls to build_txq_size 
Fixes: 688a639117 ("nir: add nir_tex_instr::can_speculate")
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36394>
 2025-07-26 20:43:36 +02:00
Timothy Arceri dd71263c21 glsl: rename setup_uniform_remap_tables() 
Remove the preceeding nir as that is generally reserved for helpers
used across files.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36366>
 2025-07-26 07:22:36 +00:00
Timothy Arceri cb558b2b88 glsl: add mark_array_elements_referenced() fast path 
Add a fast path for single dimension arrays. This is around 3x
faster on large arrays. For example when testing a shader from
issue 9953 compile time went from ~12 seconds down to ~4 seconds.

Issue: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9953

Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36366>
 2025-07-26 07:22:36 +00:00
Timothy Arceri 8579c21798 glsl: move mark_array_elements_referenced() with ubo code 
Since we no longer share this with the old glsl ir linker just move
it to where it is called from.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36366>
 2025-07-26 07:22:35 +00:00
Yiwei Zhang 62ff99d9c3 venus: add code owners 
Based on shortlog of src/virtio/vulkan.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36387>
 2025-07-26 00:33:59 +00:00
Georg Lehmann 845961ab77 nir: remove NIR_PASS_V 
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10409
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36381>
 2025-07-25 23:09:56 +00:00
Mike Blumenkrantz 8e82bafae6 zink: drop primitiveTopologyPatchListRestart from profile 
I thought this was required but actually it's just a broken test

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36384>
 2025-07-25 15:11:18 -04:00
Rohit Athavale 1be3ee7c0c mediafoundation: Add guids for the newly added Input Delta QP & Absolute QP APIs 
While these GUIDs make their way through the SDK, add them for now
directly, to be able to perform Input QP related development.

Reviewed-by: Pohsiang (John) Hsu <pohhsu@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36379>
 2025-07-25 17:33:35 +00:00
Pohsiang (John) Hsu d1691272b5 d3d12: Fix mediafoundation build 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36379>
 2025-07-25 17:33:35 +00:00
Jesse Natalie d3a284660e d3d12: Use NIR_PASS instead of NIR_PASS_V 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36299>
 2025-07-25 08:55:14 -07:00
Jesse Natalie a8858fc96a dozen: Use NIR_PASS instead of NIR_PASS_V 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36299>
 2025-07-25 08:55:14 -07:00
Jesse Natalie 4528ad5281 microsoft/clc: Use NIR_PASS instead of NIR_PASS_V 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36299>
 2025-07-25 08:55:14 -07:00
Jesse Natalie 2ca10a854f microsoft/compiler: Use NIR_PASS instead of NIR_PASS_V 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36299>
 2025-07-25 08:55:14 -07:00
Jesse Natalie f7db71949e gallium/aux: nir_lower_pstipple_fs progress and metadata 
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36299>
 2025-07-25 08:55:14 -07:00
Mike Blumenkrantz a76f1cf3ee zink: create a dummy image for shaderdb runs 
Fixes: 0a2c395394 ("zink: require nullDescriptor feature")

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13591
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36377>
 2025-07-25 14:30:19 +00:00
Pierre-Eric Pelloux-Prayer 718fd47dde nir/lower_io: make sure range is not 0 
For samplers the type_size() callback can return 0, which triggers
a NIR validation error.
In this case set range to ~0 which means the range is unknown.

Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36263>
 2025-07-25 15:47:20 +02:00
Georg Lehmann 004f8aa2f4 aco: optimize get_alu_src with constant source and size > 1 
Emulated FSR4, Navi31:
Totals from 14 (100.00% of 14) affected shaders:
MaxWaves: 130 -> 131 (+0.77%)
Instrs: 67887 -> 67470 (-0.61%); split: -0.70%, +0.09%
CodeSize: 464428 -> 461668 (-0.59%); split: -0.67%, +0.07%
VGPRs: 2544 -> 2520 (-0.94%)
SpillVGPRs: 92 -> 89 (-3.26%)
Latency: 256823 -> 257574 (+0.29%); split: -0.37%, +0.66%
InvThroughput: 253895 -> 252929 (-0.38%); split: -0.40%, +0.02%
VClause: 997 -> 984 (-1.30%); split: -2.11%, +0.80%
Copies: 4501 -> 3788 (-15.84%); split: -17.35%, +1.51%
PreSGPRs: 504 -> 519 (+2.98%)
PreVGPRs: 2460 -> 2448 (-0.49%)
VALU: 57202 -> 56726 (-0.83%); split: -0.88%, +0.05%
SALU: 1231 -> 1384 (+12.43%)
VMEM: 3807 -> 3801 (-0.16%)
VOPD: 2693 -> 2303 (-14.48%); split: +1.19%, -15.67%

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36090>
 2025-07-25 11:33:00 +00:00
David Rosca cc7178b9eb radv/video: Use the new defines for H264 SPS info flags 
Also set gaps_in_frame_num_value_allowed_flag.

Cc: mesa-stable
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36225>
 2025-07-25 09:32:08 +00:00
Konstantin Seurer 48d15c3cf8 radv/bvh: Specialize the update shader for geometryCount==1 
The geometry data can be loaded from push constants in that case.

Reviewed-by: Natalie Vock <natalie.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35445>
 2025-07-25 09:05:13 +00:00
Konstantin Seurer b20ab07e4a radv/bvh: Update leaf nodes before refitting 
This should reduce latency between refitting nodes and their parent
nodes.

Reviewed-by: Natalie Vock <natalie.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35445>
 2025-07-25 09:05:13 +00:00
Konstantin Seurer 33a694fe9b radv: Initialize base IDs when doing a BVH update with src!=dst 
Fixes: 2d48b2c ("radv: Use subgroup OPs for BVH updates on GFX12")
Reviewed-by: Natalie Vock <natalie.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35445>
 2025-07-25 09:05:12 +00:00