Commit Graph

173563 Commits

Author SHA1 Message Date
Nanley Chery
d7bfa8051e intel/isl: Remove a CCS_D check from gfx12+ code
This aux usage isn't used on gfx12+.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28284>
2024-04-04 15:17:50 +00:00
Nanley Chery
8845f1e439 intel/isl: Remove inconsistency when encoding Tile64
We guard surface state encoding of tilings by macros when the encoded
value is not present on certain platforms. For gfx20 however, we added
these macros even when the existing ones for gfx125 were sufficient.
Remove the extra macros.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28284>
2024-04-04 15:17:50 +00:00
Nanley Chery
81d8c071ac intel/isl: Remove inconsistency when choosing Tile64
We don't check the gfx version when choosing the tiling except when
choosing Tile64. Drop the version check for consistency and to remove
doubts about the order of operations occuring as expected within the
CHOOSE macro.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28284>
2024-04-04 15:17:50 +00:00
Dave Airlie
f8e48b561e mesa: reorder st context teardown
some gnome tests are seeing this:

==4579== Invalid read of size 4
==4579==    at 0x161B28FB: UnknownInlinedFun (simple_mtx.h:106)
==4579==    by 0x161B28FB: st_save_zombie_sampler_view (st_context.c:213)
==4579==    by 0x161D762A: st_texture_release_all_sampler_views.part.0 (st_sampler_view.c:272)
==4579==    by 0x161D7CB6: st_texture_release_all_sampler_views (st_sampler_view.c:258)
==4579==    by 0x161D7CB6: st_delete_texture_sampler_views (st_sampler_view.c:292)
==4579==    by 0x16191B9E: _mesa_delete_texture_object (texobj.c:523)
==4579==    by 0x16191CDC: _mesa_reference_texobj_ (texobj.c:637)
==4579==    by 0x1619632F: _mesa_reference_texobj (texobj.h:92)
==4579==    by 0x1619632F: _mesa_free_texture_data (texstate.c:1114)
==4579==    by 0x162EEE1D: _mesa_free_context_data (context.c:1155)
==4579==    by 0x161B3C0F: st_destroy_context (st_context.c:999)
==4579==    by 0x160F155A: dri_destroy_context (dri_context.c:277)
==4579==    by 0x1603C371: dri2_destroy_context (egl_dri2.c:1592)
==4579==    by 0x1602EBF5: eglDestroyContext (eglapi.c:918)
==4579==    by 0x502DF3C: gdk_gl_context_dispose (gdkglcontext.c:211)
==4579==  Address 0x34dc9b08 is 7,016 bytes inside an unallocated block of size 10,336 in arena "client"
==4579==

It appears we destroy the mutex and zombie objects, but freeing
context data seems to add them back.

This might not be the complete answer.

Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28565>
2024-04-04 14:40:57 +00:00
Faith Ekstrand
067bbf9301 nvk: Delete dead descriptor code
We never use nir_address_format_64bit so this is all dead.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28564>
2024-04-04 14:11:46 +00:00
Faith Ekstrand
f30ce26569 nvk: Add a _pad field to nvk_cbuf
We use nvk_cbuf as a key in a hash table in nvk_nir_lower_descriptors()
so we want to make sure it always gets fully initialized.

Fixes: f1c909edd5 ("nvk/nir: Add cbuf analysis to nvi_nir_lower_descriptors()")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10956
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28564>
2024-04-04 14:11:46 +00:00
Mike Blumenkrantz
cfa955ed78 glx/egl: fix LIBGL_KOPPER_DISABLE
when set, this disables the use of vk swapchains and lets the dri frontend
manage buffers like any other driver

also document some kopper env vars

Acked-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28137>
2024-04-04 13:18:00 +00:00
Mike Blumenkrantz
d3730fcd2d egl/x11: disable swapbufferswithdamage for zink without kopper
this is broken

Acked-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28215>
2024-04-04 12:48:49 +00:00
Mike Blumenkrantz
9fe9681db1 zink: assert that ntv interp handling isn't doing implicit component expansion
the number of components that ntv loads should always be the number of components
that the nir shader thinks it's loading

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28530>
2024-04-04 12:13:44 +00:00
Mike Blumenkrantz
a7509a09ec zink: fix add_derefs for partial interp loads of derefs
this needs to load the full deref and then swizzle, not interp a partial
deref

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28530>
2024-04-04 12:13:44 +00:00
Mike Blumenkrantz
7deef8d7d2 zink: delete some maintenance5 psiz pruning
now that gallium is no longer adding these all over, they don't need
to be deleted

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28162>
2024-04-04 11:26:17 +00:00
Mike Blumenkrantz
24453579ad gallium: rework PIPE_CAP_POINT_SIZE_FIXED
this adds modes to the cap which allow drivers to opt out of the
frontend injecting gl_PointSize=1.0 into shaders while still getting
the uniform value uploaded

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28162>
2024-04-04 11:26:17 +00:00
Jesse Natalie
201053bac1 d3d12: Fix d3d12_lower_triangle_strip if multiple vars are in a single location
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28562>
2024-04-04 10:37:30 +00:00
Rob Clark
c17ef8c196 freedreno+virgl: Add missing driconf
Probably a sign that we need a better long term approach for dealing
with vdrm native context drivers driconf.

Fixes: 850267ef99 ("freedreno/a6xx: Add dual_color_blend_by_location")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28531>
2024-04-04 09:38:57 +00:00
Rob Clark
6d17577b64 freedreno/drm/virtio: Fix deadlock on exit
We don't want the retire work to be the one to drop the last reference
to the pipe, as that would result in trying to free the retire_queue
from the retire_queue thread.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28531>
2024-04-04 09:38:57 +00:00
Mike Blumenkrantz
37be4bf1b7 mesa: clamp binary pointer in ShaderBinary if length==0
this pointer is only valid if length is valid

fixes dEQP-GL45-ES3.functional.negative_api.shader.shader_binary with
glthread enabled

fixes #10915

cc: mesa-stable

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28501>
2024-04-04 07:01:21 +00:00
Yiwei Zhang
6e91c88036 venus: use STACK_ARRAY to simplify sync wait
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28532>
2024-04-04 06:35:54 +00:00
Yiwei Zhang
30824a1183 venus: use STACK_ARRAY to simplify set layout creation
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28532>
2024-04-04 06:35:54 +00:00
Yiwei Zhang
bece318296 venus: use STACK_ARRAY to simplify physical device enumeration
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28532>
2024-04-04 06:35:54 +00:00
Yiwei Zhang
630f4a5b92 venus: use STACK_ARRAY to simplify render pass creation
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28532>
2024-04-04 06:35:54 +00:00
Yiwei Zhang
36f639375b venus: use STACK_ARRAY to simplify BindImageMemory2
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28532>
2024-04-04 06:35:54 +00:00
Yiwei Zhang
7f75ebfda7 venus: use STACK_ARRAY to simplify BindBufferMemory2
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28532>
2024-04-04 06:35:54 +00:00
Yiwei Zhang
02985e37ed venus: use STACK_ARRAY to simplify modifier query
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28532>
2024-04-04 06:35:54 +00:00
Yiwei Zhang
c3edd6b555 venus: remove obsolete TODOs
The ring cs shmem cache is already there. The external fence/sempahore
support will be eventually via adopting mesa common drm syncobj support.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28532>
2024-04-04 06:35:54 +00:00
Yiwei Zhang
93421ef3d3 venus: cleanup 2 TODOs from 1.3 support
The two extensions are implemented natively but allow to leak structs to
renderer side to avoid deep copying huge driver side pNext chain. It
doesn't make things more robust if we hide the two behind core 1.3 and
drop the two from the protocol so that venus-protocol filters out the
leaked structs. e.g. we'd still have to flip some bits in the core
feature structs.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28532>
2024-04-04 06:35:53 +00:00
Job Noorman
1e983c4360 ir3: fix finding uses of reloaded defs in predicates RA
While looking for the first use of a def for spilling, we used to
iterate all sources of a use to determine which one refers to the def.
However, when the def was reloaded before, we would fail to find it
since the source was updated to refer to the reloaded def while we
searched the uses of the original def.

This patch fixes this by simply not iterating the sources of a use
anymore. We don't need to know which source exactly uses the def, the
instruction is enough.

Fixes: 21cd9b9557 ("ir3: implement RA for predicate registers")
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28148>
2024-04-04 05:39:45 +00:00
Job Noorman
dbcbf61726 ir3: calculate SSA uses at the start of predicates RA
When calculating SSA uses after reloading a def for the first time, the
uses of the original def would not be complete anymore (since some of
its uses may be replaced by a reloaded def). This causes problems when
calculating the furthest first use to determine a value to be spilled.

For example, something like:

ssaX = foo # No free regs so this one is ignored
...
bar ssaX, ssaY So

Let's say we arrive at bar and neither ssaX nor ssaY are live and we
have one free register. First, ssaX will get reloaded. Then, since there
are no free registers left, we need to spill one. If we calculate SSA
uses now, the ones for ssaX will not include bar which might cause us to
select ssaX for spilling which shouldn't happen because it's used by the
current instruction.

This patch fixes this by calculating SSA uses at the start of RA. I
haven't been able to measure a significant performance improvement when
trying to postpone calculating the SSA uses.

Fixes: 21cd9b9557 ("ir3: implement RA for predicate registers")
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28148>
2024-04-04 05:39:45 +00:00
Job Noorman
22f64a1fe3 zink: print shaderdb info via debug message callback
shaderdb expects to receive shader info via a glDebugMessageCallback
callback. This patch updates print_pipeline_stats to use the
zink_context::dbg callback.

The format of the shader info is also updated to match what the shaderdb
report.py script expects. In particular, we use what report.py calls
"nv_format" since that is the closest to the current format.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28542>
2024-04-04 02:59:10 +00:00
Rohan Garg
57209a0c7a isl: allow CCS on single sampled TILE64 surfaces
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23030>
2024-04-04 02:17:34 +00:00
Rohan Garg
afb63443a0 intel/blorp: add fast clear rectangle dimensions for single sampled TILE64 CCS surfaces
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23030>
2024-04-04 02:17:34 +00:00
Rohan Garg
8670fd6ac4 iris: slow clear higher miplevels on single sampled 8bpp resources that have TILE64
This helps fix a number of piglit tests that exercise this
functionality, such as:
  - piglit.spec.arb_texture_rg.fbo-clear-formats
  - piglit.spec.ext_framebuffer_object.fbo-clear-formats
  - piglit.spec.ext_texture_snorm.fbo-clear-formats

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23030>
2024-04-04 02:17:34 +00:00
Marek Olšák
772149b15a nir/opt_varyings: handle load_input_vertex
Explicit interpolation just loads raw vertex data as-is and lets the FS do
the interpolation manually.

This adds handling of nir_intrinsic_load_input_vertex, which has 2 different
behaviors: undefined vertex ordering and strict vertex ordering.

- dead IO removed correctly
- constants and uniform expressions are propagated normally
- outputs are deduplicated within their own category (strict and non-strict)
- outputs used by explicit interpolation are never treated as "convergent"
- backward inter-shader code motion is skipped
- compaction has 2 new types of vec4 slots:
    - mixed 32-bit and 16-bit explicit strict (sharing the same vec4)
    - mixed 32-bit and 16-bit explicit non-strict (sharing the same vec4)

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28247>
2024-04-04 01:25:06 +00:00
Timur Kristóf
b9b557f2e7 aco/optimizer_postRA: Remove a check from SCC no-compare optimization.
Not all code paths of this optimization depend on there being only
one user of the first operand; and those code paths already have
their own check for this.

Fossil DB stats on Navi 21:

Totals from 477 (0.60% of 79395) affected shaders:
Instrs: 995901 -> 995341 (-0.06%); split: -0.06%, +0.00%
CodeSize: 5218856 -> 5216816 (-0.04%); split: -0.04%, +0.00%
Latency: 16340256 -> 16338799 (-0.01%); split: -0.01%, +0.00%
InvThroughput: 3044975 -> 3044871 (-0.00%); split: -0.00%, +0.00%
Copies: 95047 -> 95071 (+0.03%)
SALU: 150345 -> 149785 (-0.37%); split: -0.38%, +0.01%

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28545>
2024-04-04 00:50:11 +00:00
Ganesh Belgur Ramachandra
5b301e74ed compiler,glsl: fix warning when -finstrument-functions is used
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28411>
2024-04-04 00:03:53 +00:00
Timur Kristóf
5fa70730da radv: Use IO semantic location for shader output info.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28172>
2024-04-03 23:40:33 +00:00
Timur Kristóf
f23795e78c radv: Use NIR IO semantics to determine VS input info.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28172>
2024-04-03 23:40:33 +00:00
Timur Kristóf
9fd67c84da radv: Remove unused VS input usage mask.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28172>
2024-04-03 23:40:33 +00:00
Timur Kristóf
0ddecb3f0e radv: Add helper to determine usage of VS prologs.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28172>
2024-04-03 23:40:33 +00:00
Timur Kristóf
5156d3097b radv: Add helper for determining per-attribute vertex buffer descriptors.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28172>
2024-04-03 23:40:33 +00:00
Timur Kristóf
e04f66ae33 radv: Use NIR IO semantics to determine GS output info.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28172>
2024-04-03 23:40:33 +00:00
Timur Kristóf
7276bea52d radv: Record PS input clip/cull mask instead of number.
Keeping the mask instead of the actual number will make it easier
later to transition to basing the information on I/O intrinsics
instead of I/O variables.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28172>
2024-04-03 23:40:33 +00:00
Timur Kristóf
cbc8f5216a radv: Slightly refactor gather_intrinsic_store_output_info.
No functional changes.
Use const more, and rename some variables to make them clearer.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28172>
2024-04-03 23:40:33 +00:00
Timur Kristóf
d10e458df0 radv: Extract gather_load_vs_input_info function.
No functional changes.
Make the code look cleaner by handling the various stages
by different functions.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28172>
2024-04-03 23:40:33 +00:00
Timur Kristóf
4e2eeab90d radv: Pass key structures to gather intrinsic info.
No functional changes.
The information in these structures will be needed
in a later commit. Done separately to help keep that
other commit cleaner.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28172>
2024-04-03 23:40:33 +00:00
Timur Kristóf
c27877cff9 radv: Only add extra dword to LS-HS stride when there are LS outputs.
Fixes: d116272689
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28544>
2024-04-03 23:15:01 +00:00
Eric R. Smith
ad7457fe20 panfrost: mark indirect compute buffer as read
When we dispatch an indirect compute job, the buffer containing
the indirect parameters should be marked as read (since the GPU
will read the parameters from there). Without this there's a
race condition if the CPU later updates the buffer.

Signed-off-by: Eric R. Smith <eric.smith@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28512>
2024-04-03 22:54:28 +00:00
Connor Abbott
fb1c3f7f5d tu: Implement CCHE invalidation
We need invalidate CCHE when we optimize out an invalidation of UCHE,
for example a storage image write to texture read. We missed this
earlier because of the blob's tendency to always over-flush, but the
blob does use this when building acceleration structures.

Fixes: 95104707f1 ("tu: Basic a7xx support")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28445>
2024-04-03 21:10:25 +00:00
Connor Abbott
abe9bd38ff freedreno/a7xx: Add CP_CCHE_INVALIDATE
Fixes: 95104707f1 ("tu: Basic a7xx support")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28445>
2024-04-03 21:10:25 +00:00
José Roberto de Souza
a47a65c1c2 intel/genxml/xe2: Update definition of INTERFACE_DESCRIPTOR_DATA
This maches specification and better matches the gfx 125 definition.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28505>
2024-04-03 20:21:04 +00:00
José Roberto de Souza
0f29b780e1 intel/genxml/gfx125: Fix definition of INTERFACE_DESCRIPTOR_DATA::Thread group dispatch size
It was using the wrong platform definition that only had 1 bit,
filtering by DG2/ACM it shows the correct definition.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28505>
2024-04-03 20:21:04 +00:00