Commit Graph

65994 Commits

Author SHA1 Message Date
Christian König d561a42bc1 configure: use $libdir/dri as default for VA-API
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-10-13 12:43:59 +02:00
Christian König 966ae170b0 configure: remove superflous VA-API line from configure.ac
We don't have GALLIUM_STATE_TRACKERS_DIRS any more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-10-13 12:43:54 +02:00
Christian König d3004a267a configure: respect $libdir for the OMX installation dir
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-10-13 12:43:49 +02:00
Christian König 5ce06d12ff configure: Revert "ask vdpau.pc for the default location of the vdpau drivers"
This reverts commit bbe6f7f865.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-10-13 12:43:05 +02:00
Eric Anholt 83365a5b57 vc4: Add support for the CEIL opcode.
Not as big of a deal as SSG, but still +9 piglit tests.
2014-10-13 08:06:48 +01:00
Eric Anholt 926eaa9af4 vc4: Add support for the SSG opcode. 2014-10-13 08:06:48 +01:00
Emil Velikov b86f814afd docs: add news item and link release notes
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2014-10-13 02:14:02 +01:00
Emil Velikov fc6345a916 docs: Add sha256 sums for the 10.3.1 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit fa98c74692634de4f87694a40a299b59c4716ee5)
2014-10-13 02:06:29 +01:00
Emil Velikov 04fae07f0e Add release notes for the 10.3.1 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit 088d3501786a2ff0833de45951b63acbe6560a0f)
2014-10-13 02:06:20 +01:00
Emil Velikov 66ea8a581d docs: Add sha256 sums for the 10.2.9 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit 52bd154980e306b8bc9b9d2edc0e728a9f8f3bf6)
2014-10-13 02:05:53 +01:00
Emil Velikov f5e61295cd Add release notes for the 10.2.9 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit 9f1149876f2d010c871751a53d02d4d2b6aef1fe)
2014-10-13 02:05:22 +01:00
Glenn Kennard a327fa3a06 r600g: Implement GL_ARB_sample_shading
Also fixes two sided lighting which was broken at least
on pre-evergreen by commit b1eb00.

Signed-off-by: Glenn Kennard <glenn.kennard@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2014-10-12 23:53:57 +02:00
Marek Olšák 75e97e2e3f radeonsi: use tgsi_shader_info in si_llvm_emit_fs_epilogue
This is the last use tgsi_parse_token in radeonsi.

It looks ugly because the code was re-indented, but there is really no change
in behavior.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-10-12 23:53:57 +02:00
Marek Olšák 558f7770a7 radeonsi: remove si_shader_output_values::index
It's redundant now.

It led to a simplification in si_llvm_emit_streamout, because outidx == reg.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-10-12 23:53:57 +02:00
Marek Olšák ec0d16872b radeonsi: use tgsi_shader_info in si_llvm_emit_vs_epilogue
That code was really ugly.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-10-12 23:53:57 +02:00
Marek Olšák 8067732740 radeonsi: remove shader->input[] and output[] arrays and dependencies
They were reinventing tgsi_shader_info. They are unused now.

radeon_llvm_context::load_input can be NULL if input fetching is implemented
in some other way.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-10-12 23:53:57 +02:00
Marek Olšák 8b057ddaea radeonsi: move param_offset out of shader->input[] and output[]
Those are going away.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-10-12 23:53:57 +02:00
Marek Olšák 02134cfaae radeonsi: use tgsi_shader_info to get a list of GS outputs
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-10-12 23:53:54 +02:00
Marek Olšák 101905d3f7 radeonsi: use tgsi_shader_info in si_update_spi_map
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-10-12 23:53:54 +02:00
Marek Olšák 6f04cf7fac radeonsi: simplify dereferences in si_update_spi_map
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-10-12 23:53:54 +02:00
Marek Olšák 639f6b41d2 radeonsi: use tgsi_shader_info in si_shader_vs
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-10-12 23:53:54 +02:00
Marek Olšák fa933438a2 radeonsi: use tgsi_shader_info in si_shader_ps
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-10-12 23:53:54 +02:00
Marek Olšák e23fec1445 radeonsi: use tgsi_shader_info in fetch_input_gs
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-10-12 23:53:51 +02:00
Marek Olšák 7a645c5366 radeonsi: don't rely on shader->output in si_llvm_emit_fs_epilogue
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-10-12 23:52:16 +02:00
Marek Olšák 216cf86ec4 radeonsi: use tgsi_shader_info in si_llvm_emit_es_epilogue
tgsi_shader_info contains everything we need.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-10-12 23:52:13 +02:00
Marek Olšák 34e8200599 radeonsi: don't recompile shaders when changing nr_cbufs from 0 to 1
Both cases are equivalent.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-10-12 23:52:07 +02:00
Marek Olšák 5e0fbe1b63 radeonsi: remove vs.ucps_enabled from the shader key
Written CLIPDIST outputs are simply disabled in PA_CL_VS_OUT_CNTL.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-10-12 23:52:02 +02:00
Marek Olšák a9592cd3ac radeonsi: assume ClipDistance usage mask is always 0xf
No code in Mesa sets the usage mask to any other value.
The final mask is AND'ed with enable bits from the rasterizer state anyway.

If somebody implements setting usage masks in st/mesa, we can use
tgsi_shader_info to get it more easily.

This is a prerequisite for the following commit.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-10-12 23:51:44 +02:00
Francisco Jerez 2286edce16 clover: Fix unintended fall-through in kernel::argument::bind. 2014-10-12 11:44:05 +03:00
Jan Vesely 5bffc5e262 clover: Append implicit arguments to the kernel argument list.
[ Francisco Jerez: Split off from a larger patch, and take a slightly
  different approach for passing the implicit arguments around. ]

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2014-10-12 01:50:13 +03:00
Francisco Jerez bf89a97748 clover: Pass execution dimensions and offset to the kernel as implicit arguments.
Reviewed-by: Jan Vesely <jan.vesely@rutgers.edu>
2014-10-12 01:44:19 +03:00
Francisco Jerez 06139c56fa clover: Add semantic information to module::argument for implicit parameter passing.
Reviewed-by: Jan Vesely <jan.vesely@rutgers.edu>
2014-10-12 01:39:21 +03:00
Francisco Jerez 27c51b5f58 clover: Use unreachable() from util/macros.h instead of assert(0).
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2014-10-11 12:44:09 +03:00
Vinson Lee 5480d6b13f gallium: Add tokens for DragonFly BSD.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Acked-by: Brian Paul <brianp@vmware.com>
2014-10-10 21:32:35 -07:00
Chia-I Wu 566d1889ea ilo: disassemble compacted instructions
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
2014-10-11 11:55:50 +08:00
Erik Faye-Lund 326e303175 glsl: improve accuracy of atan()
Our current atan()-approximation is pretty inaccurate at 1.0, so
let's try to improve the situation by doing a direct approximation
without going through atan.

This new implementation uses an 11th degree polynomial to approximate
atan in the [-1..1] range, and the following identitiy to reduce the
entire range to [-1..1]:

atan(x) = 0.5 * pi * sign(x) - atan(1.0 / x)

This range-reduction idea is taken from the paper "Fast computation
of Arctangent Functions for Embedded Applications: A Comparative
Analysis" (Ukil et al. 2011).

The polynomial that approximates atan(x) is:

x   * 0.9999793128310355 - x^3  * 0.3326756418091246 +
x^5 * 0.1938924977115610 - x^7  * 0.1173503194786851 +
x^9 * 0.0536813784310406 - x^11 * 0.0121323213173444

This polynomial was found with the following GNU Octave script:

x = linspace(0, 1);
y = atan(x);
n = [1, 3, 5, 7, 9, 11];
format long;
polyfitc(x, y, n)

The polyfitc function is not built-in, but too long to include here.
It can be downloaded from the following URL:

http://www.mathworks.com/matlabcentral/fileexchange/47851-constraint-polynomial-fit/content/polyfitc.m

This fixes the following piglit test:
shaders/glsl-const-folding-01

Signed-off-by: Erik Faye-Lund <kusmabite@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-10-10 20:44:27 +02:00
Eric Anholt 070b2c2efc vc4: Use the fnv1 hash function instead of gallium util's crc32.
Improves simulated norast performance on a little benchmark by 13.4012%
+/- 2.08459% (n=13).
2014-10-10 15:49:34 +02:00
Eric Anholt d09509da2a vc4: Don't look up the compiled shaders unless state has changed.
Improves simulated norast performance on a little benchmark by 38.0965%
+/- 3.27534% (n=11).
2014-10-10 15:49:22 +02:00
Eric Anholt c6f50c4086 vc4: Actually clear the context's dirty flags.
I was trying to skip state updates when !dirty, and suspiciously
everything was always dirty.
2014-10-10 15:03:13 +02:00
Eric Anholt 7c474f9f2e vc4: Optimize the other case of SEL_X_Y wih a 0 -> SEL_X_0(a).
Cleans up some output to be more obvious in a piglit test I'm looking at.
2014-10-10 15:03:12 +02:00
Tapani Pälli ac557b4c12 mesa: fix error reported on gTexSubImage2D when level not valid
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
2014-10-10 15:01:51 +03:00
Kenneth Graunke 94841b6d5d i965: Fix register write checks.
When mapping the buffer a second time, we need to use the new pointer,
not the one from the previous mapping.  Otherwise, we will most likely
crash.

Apparently, we've just been getting lucky and getting the same
bo->virtual pointer in both cases.  libdrm probably has a hand in that.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
2014-10-10 00:04:39 +02:00
Eric Anholt 7e67ea994c vc4: Optimize out adds of 0. 2014-10-09 21:47:06 +02:00
Eric Anholt 0401f55fff vc4: Optimize fmul(x, 0) and fmul(x, 1).
This was being generated frequently by matrix multiplies of 2 and
3-channel vertex attributes (which have the 0 or 1 loaded in the shader).
2014-10-09 21:47:06 +02:00
Eric Anholt 1cd8c1aab0 vc4: Factor out the turn-it-into-a-mov in opt_algebraic.
This will be used more in the next commits.
2014-10-09 21:47:06 +02:00
Eric Anholt 40748cf8d9 vc4: Eliminate unused texture instructions. 2014-10-09 21:47:06 +02:00
Eric Anholt b73cab6826 vc4: Dead code eliminate unused SF instructions. 2014-10-09 21:47:06 +02:00
Eric Anholt 93cac2637b vc4: Prevent copy propagating out the MOVs from r4.
Copy propagating these might result in reading the r4 after some other
instruction has written r4.  Just prevent all copy propagation of this for
now.

Fixes bad rendering with upcoming indirect register access support, where
the copy propagation was consistently happening across another read.
2014-10-09 21:47:06 +02:00
Eric Anholt c4b0dd5356 vc4: Split the coordinate shader to its own vc4_compiled_shader.
Merging VS and CS into the same struct wasn't winning us anything except
for not allocating a separate BO (but if we want to pack programs into
BOs, we should pack not just those 2 programs together).  What it was
getting us was a bunch of code duplication about hash table lookups and
propagating vc4_compile contents into a vc4_compiled_shader.

I was about to make the situation worse with indirect uniform buffer
access.
2014-10-09 21:47:06 +02:00
Eric Anholt 5c72d7706c vc4: Add #defines for the texture uniform fields.
I wanted to make another set of texture uploads for handling reladdr
constants, and duplicating all the bitshifting looked like a terrible
idea.  In the process, this fixes a swap of the s/t texture wrap modes.
2014-10-09 21:47:06 +02:00