Erik Faye-Lund
cd6c4bf772
pvr: remove unused member
...
We never read this member, so let's cull it.
Acked-by: Ashish Chauhan <Ashish.Chauhan@imgtec.com >
Acked-by: Frank Binns <frank.binns@imgtec.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38832 >
2025-12-11 15:26:01 +00:00
Erik Faye-Lund
c11f5197f5
pvr: do not store VkFormat in pvr_format
...
The VkFormat is the key into the format-table, so we always know from a
higher level up what VkFormat we're talking about. So let's instead pass
VkFormat around, and look up pvr_format from the format-table later on
instead.
This leads to a few more lookups, but those are relatively cheap, and
doesn't happen in critical code-paths.
Acked-by: Ashish Chauhan <Ashish.Chauhan@imgtec.com >
Acked-by: Frank Binns <frank.binns@imgtec.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38832 >
2025-12-11 15:26:01 +00:00
Erik Faye-Lund
de5d08eb72
pvr: move include to source-file
...
Acked-by: Ashish Chauhan <Ashish.Chauhan@imgtec.com >
Acked-by: Frank Binns <frank.binns@imgtec.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38832 >
2025-12-11 15:25:59 +00:00
Hans-Kristian Arntzen
c00ae68585
egl/x11: Fix memory leak when querying translated coord.
...
Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no >
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38901 >
2025-12-11 14:58:59 +00:00
Emma Anholt
1a2d0d3f31
nir: Optimistically unroll loops using induction var as a sample id.
...
On the assumption that nobody will use a sample id greater than the sample
count, have loop unrolling guess based on the driver's max sample count.
This unrolls a simple resolve shader with a uniform max samples on ir3 to:
value = vec4(0);
if (max_samples > 0) {
value += txf_ms(coord, 0);
if (max_samples > 1 {
value += txf_ms(coord, 1);
if (max_samples > 2){
value += txf_ms(coord, 2);
if (max_samples > 3) {
value += txf_ms(coord, 3);
for (i = 4; i < max_samples; i++)
value += txf_ms(coord, i);
}
}
}
}
...
This is only worth a 1% win on our microbenchmark as-is, but if we could
flatten those ifs out and pull the fadds out to the end, avoiding syncs
per load would be a big win. This seems like a first step.
I've taken a shot at updating drivers to set the value, and tried to leave
notes in places that drivers might update, and want to follow up with
updating the compiler option.
This affects over half the DX11 apps in shader-db-private.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38585 >
2025-12-11 14:26:11 +00:00
Emma Anholt
10ba7675c8
nir/uub: Use an optional max_samples from drivers for sample counts.
...
This triggers some unrolling in Fallout 4, GTAV, and Rocky Planet in my
shader-db.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38585 >
2025-12-11 14:26:11 +00:00
Emma Anholt
dc30e1a128
nir/loop_analyze: Use nir_unsigned_upper_bound for loop trip limits.
...
This triggers some unrolling in Monster Hunter World, Total War:
Warhammer, and Planet Zoo.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38585 >
2025-12-11 14:26:10 +00:00
Luigi Santivetti
564bf2379e
pvr: enable VK_KHR_dynamic_rendering
...
Signed-off-by: Luigi Santivetti <luigi.santivetti@imgtec.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38744 >
2025-12-11 12:52:28 +00:00
Luigi Santivetti
146364ab9f
pvr: add support for VK_KHR_dynamic_rendering
...
Signed-off-by: Luigi Santivetti <luigi.santivetti@imgtec.com >
Co-authored-by: Ella Stanforth <ella@igalia.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38744 >
2025-12-11 12:52:28 +00:00
Luigi Santivetti
5b752ccab0
pvr: move code for resolving attachments
...
In preparation for dynamic rendering and for removing renderpasses
move relevant code so it doesn't need to move again.
Signed-off-by: Luigi Santivetti <luigi.santivetti@imgtec.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38744 >
2025-12-11 12:52:28 +00:00
Luigi Santivetti
edadff30d8
pvr: get the format for start of render clears from pass info
...
In preparation for dynamic rendering make the code in start of renders
clear more robust and generic so not to depend on render passes when
it doesn't have / need to.
Signed-off-by: Luigi Santivetti <luigi.santivetti@imgtec.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38744 >
2025-12-11 12:52:28 +00:00
Luigi Santivetti
5d46d6c93c
pvr: do not assert in multi-layer rta emulated path
...
The assert here was too strict and dynamic rendering tests do exercise this
part. The correct fix is to either re-enable RTA support or handle properly
multi-layered emulation.
Signed-off-by: Luigi Santivetti <luigi.santivetti@imgtec.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38744 >
2025-12-11 12:52:27 +00:00
Ella Stanforth
2eabbbe57d
pvr: use linked list to back deferred clears
...
Signed-off-by: Ella Stanforth <ella@igalia.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38744 >
2025-12-11 12:52:27 +00:00
Luigi Santivetti
8e52b6adb7
pvr: be more restrictive of when to emit vdm terminate
...
Signed-off-by: Luigi Santivetti <luigi.santivetti@imgtec.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38744 >
2025-12-11 12:52:27 +00:00
Luigi Santivetti
656050bab1
pvr: split out command buffer render pass inheritance
...
Signed-off-by: Luigi Santivetti <luigi.santivetti@imgtec.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38744 >
2025-12-11 12:52:26 +00:00
Luigi Santivetti
ef73c58918
pvr: split out device tile buffers teardown
...
Signed-off-by: Luigi Santivetti <luigi.santivetti@imgtec.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38744 >
2025-12-11 12:52:26 +00:00
Luigi Santivetti
b42522a719
pvr: split framebuffer clear values allocation and setup
...
Signed-off-by: Luigi Santivetti <luigi.santivetti@imgtec.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38744 >
2025-12-11 12:52:25 +00:00
Luigi Santivetti
c0526a6880
pvr: split framebuffer attachments allocation and setup
...
Signed-off-by: Luigi Santivetti <luigi.santivetti@imgtec.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38744 >
2025-12-11 12:52:24 +00:00
Luigi Santivetti
bdfc24031b
pvr: split out driver specific framebuffer data
...
Signed-off-by: Luigi Santivetti <luigi.santivetti@imgtec.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38744 >
2025-12-11 12:52:24 +00:00
Ella Stanforth
0bf47f0435
pvr: move load_op_shader_generate to pvr_mrt
...
Signed-off-by: Ella Stanforth <ella@igalia.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38744 >
2025-12-11 12:52:23 +00:00
Ella Stanforth
b076f8170e
pvr: move pvr_load_op_state to pvr_mrt.h
...
Signed-off-by: Ella Stanforth <ella@igalia.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38744 >
2025-12-11 12:52:23 +00:00
Ella Stanforth
3d1e2b3976
pvr: move pvr_load_op to pvr_mrt.h
...
Signed-off-by: Ella Stanforth <ella@igalia.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38744 >
2025-12-11 12:52:22 +00:00
Ella Stanforth
2dcaa9866d
pvr: move tile_buffer_size logic to pvr_device.c
...
Signed-off-by: Ella Stanforth <ella@igalia.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38744 >
2025-12-11 12:52:21 +00:00
Ella Stanforth
95e24abf1a
pvr: make pvr_get_tile_buffer_size static
...
Signed-off-by: Ella Stanforth <ella@igalia.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38744 >
2025-12-11 12:52:21 +00:00
Ella Stanforth
d549c1d045
pvr: add pipeline handling to use dynamic rendering info
...
This change also preserves the functionality of the old renderpass path.
Signed-off-by: Ella Stanforth <ella@igalia.com >
Co-authored-by: Luigi Santivetti <luigi.santivetti@imgtec.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38744 >
2025-12-11 12:52:20 +00:00
Ella Stanforth
a7de9dae6b
pvr: Add routine for filling out usc_mrt_setup from dynamic rendering state
...
Signed-off-by: Ella Stanforth <ella@igalia.com >
Co-authored-by: Luigi Santivetti <luigi.santivetti@imgtec.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38744 >
2025-12-11 12:52:20 +00:00
Ella Stanforth
fae9f308ea
pvr: Avoid putting tile buffer allocators on the heap
...
Signed-off-by: Ella Stanforth <ella@igalia.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38744 >
2025-12-11 12:52:20 +00:00
Samuel Pitoiset
a89118c5b0
radv: fix race condition when getting the blit queue
...
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14439
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38883 >
2025-12-11 11:16:29 +00:00
Samuel Pitoiset
31a24caad9
radv: only include executable size when capturing shaders with RGP
...
This might help RGP to not try to disassemble past s_endpgm and crashes
on unknown instructions.
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14419
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38885 >
2025-12-11 10:56:10 +00:00
Aitor Camacho
16a94b1b7f
kk: Enable float16 and int8
...
Metal does not seem to respect memory coherency for threads. Workaround 6
enforces device coherency for global loads/stores even if it should not
be needed.
Reviewed-by: Arcady Goldmints-Orlov <arcady@lunarg.com >
Signed-off-by: Aitor Camacho <aitor@lunarg.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38847 >
2025-12-11 10:30:39 +00:00
Boris Brezillon
1e0e7d4296
pan/ci: Bump kernel versions for platforms testing panvk
...
We want to start testing new features that made it into drm-misc-next
recently, so switch to pan{frost,thor} specific kernel tags to get that
tested on g{52,610,925}.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com >
Acked-by: Valentine Burley <valentine.burley@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38890 >
2025-12-11 08:56:15 +00:00
Valentine Burley
040a24785e
panfrost/ci: Fix GitLab rules after YAML split
...
Add the new file so panfrost CI jobs are properly triggered.
Fixes: c793f612fc ("ci/panfrost: Split inherit definitions into -inc")
Signed-off-by: Valentine Burley <valentine.burley@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38890 >
2025-12-11 08:56:15 +00:00
Lionel Landwerlin
6dff50c8bc
anv: fix dynamic buffers & independent sets
...
In 0ca870c6f3 I forgot to fill the bind_map::dynamic_descriptors
array... Duh!
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Fixes: 0ca870c6f3 ("anv: fix broken ray tracing dynamic descriptors")
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38893 >
2025-12-11 08:32:32 +00:00
Georg Lehmann
ef246aaf72
aco/isel: emit register copies for workgroup ids
...
This way, we don't overestimate SGPR pressure.
Foz-DB Navi48:
Totals from 1413 (1.45% of 97637) affected shaders:
Instrs: 3468375 -> 3468585 (+0.01%); split: -0.01%, +0.02%
CodeSize: 18643064 -> 18643520 (+0.00%); split: -0.01%, +0.01%
VGPRs: 71776 -> 71788 (+0.02%)
SpillSGPRs: 18575 -> 18561 (-0.08%)
Latency: 23207643 -> 23207998 (+0.00%); split: -0.00%, +0.01%
InvThroughput: 8116806 -> 8116541 (-0.00%); split: -0.01%, +0.00%
VClause: 75250 -> 75252 (+0.00%); split: -0.00%, +0.00%
SClause: 65274 -> 65283 (+0.01%); split: -0.02%, +0.04%
Copies: 275750 -> 275942 (+0.07%); split: -0.03%, +0.10%
PreSGPRs: 70246 -> 69072 (-1.67%)
VALU: 1892111 -> 1892092 (-0.00%); split: -0.00%, +0.00%
SALU: 523460 -> 523648 (+0.04%); split: -0.02%, +0.05%
VOPD: 41097 -> 41102 (+0.01%)
Sadly the RA noise is slightly negative for instruction count.
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38830 >
2025-12-11 08:06:59 +00:00
Georg Lehmann
839a035564
aco/optimizer: propagate fixed regs to copy/extract/insert
...
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38830 >
2025-12-11 08:06:58 +00:00
Georg Lehmann
d32dd5e1df
aco/optimizer: propagate fixed registers
...
Foz-DB Navi48:
Totals from 351 (0.36% of 97637) affected shaders:
Instrs: 3568192 -> 3567166 (-0.03%)
CodeSize: 18890368 -> 18886304 (-0.02%)
Latency: 17047945 -> 17048185 (+0.00%); split: -0.00%, +0.00%
InvThroughput: 3185739 -> 3185813 (+0.00%); split: -0.00%, +0.00%
SClause: 61544 -> 61536 (-0.01%)
Copies: 271592 -> 270845 (-0.28%)
PreSGPRs: 17186 -> 17094 (-0.54%)
PreVGPRs: 21897 -> 21901 (+0.02%)
VALU: 2003976 -> 2003980 (+0.00%)
SALU: 468403 -> 467664 (-0.16%)
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38830 >
2025-12-11 08:06:58 +00:00
Georg Lehmann
b798ace443
aco/optimizer: fix skip_smem_offset_align with non temp register operands
...
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38830 >
2025-12-11 08:06:58 +00:00
Georg Lehmann
911e1ce168
aco/isel: emit exec copy for ballot(true)
...
Once copy propagated in the optimizer, this will allow
using nir_opt_uniform_subgroup without too many regressions.
Foz-DB Navi48:
Totals from 405 (0.41% of 97637) affected shaders:
Instrs: 3796716 -> 3796894 (+0.00%); split: -0.00%, +0.00%
CodeSize: 20116136 -> 20116652 (+0.00%); split: -0.00%, +0.00%
Latency: 18326661 -> 18327114 (+0.00%); split: -0.00%, +0.00%
InvThroughput: 3353206 -> 3353268 (+0.00%); split: -0.00%, +0.00%
Copies: 292307 -> 293830 (+0.52%)
SALU: 507523 -> 507738 (+0.04%)
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38830 >
2025-12-11 08:06:58 +00:00
Georg Lehmann
72e3071751
aco/optimizer: keep pass_flags valid for all instructions
...
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38830 >
2025-12-11 08:06:57 +00:00
Collabora's Gfx CI Team
d8e9c669cb
Uprev ANGLE to ee05836a4934129527544385203ecf420afc5dd1
...
127a84404b...ee05836a49
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38503 >
2025-12-11 00:09:04 +00:00
Sagar Ghuge
560b21fe49
anv/rt: Increment block count only for valid children
...
If invalid childrens don't consume space in memory, we don't have to
increment the block count. HW unit just look at the bounding boxes and
reject them in intersection test.
Also, this patch handles invalid children type encoding.
Fixes: 198537039a ("anv/rt: reduce writes to block_incr_and_start_prim")
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com >
Reviewed-by: Felix DeGrood <felix.j.degrood@intel.com >
Tested-by: Felix DeGrood <felix.j.degrood@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38717 >
2025-12-10 23:16:30 +00:00
Connor Abbott
f734dff419
tu: Fill render pass state when resuming
...
We forgot to call tu_fill_render_pass_state when resuming because it was
mixed in with emitting commands for the start of the subpass. Fix that
by pulling it out. This adds some duplication, but I think it's better
than mixing command emission and CPU-side state setup in the same
function.
Fixes: cb0f414b2a ("tu: Add support for suspending and resuming renderpasses")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38873 >
2025-12-10 22:43:10 +00:00
Mel Henning
2fab8fc297
nir: Use instr_clone in rematerialize_deref_in_block
...
The previous implementation seems to predate nir_instr_clone() and
duplicates a lot of the deref cloning code. This also makes the pass
preserve deref->arr.in_bounds correctly.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38856 >
2025-12-10 22:07:45 +00:00
Mel Henning
dc44c0f32b
treewide: Use nir_deref_instr_is_arr()
...
Via coccinelle and some manual fixups.
@@
expression e1;
@@
- e1->deref_type == nir_deref_type_array || e1->deref_type == nir_deref_type_ptr_as_array
+ nir_deref_instr_is_arr(e1)
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38856 >
2025-12-10 22:07:45 +00:00
Mel Henning
263a82f49b
nir: Add nir_deref_instr_is_arr() helper
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38856 >
2025-12-10 22:07:44 +00:00
Michael Cheng
8ba197c9ef
anv: Switch shaders to dedicated VMA allocator
...
Switched to the new VMA allocator that provides explicit GPU VA
control via util_vma_heap.
This is architectural preparation for ray tracing capture/replay,
which requires the ability to reserve and allocate shaders at specific
VAs. The state pool's free-list design makes VA reservation difficult
to add, while the new chunk allocator is designed for explicit VA
management from the ground up.
Signed-off-by: Michael Cheng <michael.cheng@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38869 >
2025-12-10 20:32:10 +00:00
Michael Cheng
1fa327ac32
anv: Add VMA allocator for shader binaries
...
Introduce a VMA-first chunk allocator for shader binaries to eventually
replace the anv_state_pool-based implementation. This allocator works
directly with GPU virtual addresses through util_vma_heap, making the
virtual address space an explicit resource managed by ANV.
No functional change in this commit.
v2(Michael Cheng): Use existing instruction state pool anv_va_range
v3(Lionel): Simplify allocator
Signed-off-by: default avatarMichael Cheng <michael.cheng@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38869 >
2025-12-10 20:32:10 +00:00
Lionel Landwerlin
20f320b7c7
anv: program STATE_BASE_ADDRESS instruction ptr using pdevice address
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Acked-by: Michael Cheng <michael.cheng@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38869 >
2025-12-10 20:32:10 +00:00
Lionel Landwerlin
7cc9d8eec7
anv: fixup error path for shader allocation
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Fixes: d39e443ef8 ("anv: add infrastructure for common vk_pipeline")
Acked-by: Michael Cheng <michael.cheng@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38869 >
2025-12-10 20:32:10 +00:00
Lionel Landwerlin
567c1b3af4
anv: add missing device_memory_report for shaders
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Fixes: d39e443ef8 ("anv: add infrastructure for common vk_pipeline")
Acked-by: Michael Cheng <michael.cheng@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38869 >
2025-12-10 20:32:09 +00:00