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Author SHA1 Message Date
Natalie Vock cd2caa5e2b aco/spill: Use scratch stack pointer 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35031>
 2025-06-26 11:02:52 +00:00
Natalie Vock 22624d6f12 aco: Add scratch stack pointer 
Function callees shouldn't overwrite caller's stacks.
Track where to write scratch data with a stack pointer.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35031>
 2025-06-26 11:02:52 +00:00
Natalie Vock be89c02be5 aco: Add pseudo instr to calculate a function callee's stack pointer 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35031>
 2025-06-26 11:02:52 +00:00
Job Noorman 54151cfb76 ir3/cf: add support for movs 
movs supports the same conversions as cov which means that any cov of
its dst can be folded into the movs if all uses of its dst are the same
type of cov.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32624>
 2025-06-26 10:22:09 +00:00
Job Noorman bf203fbf20 ir3: add codegen for movs 
movs is just nir_intrinsic_read_invocation so this is a matter of
disabling the current lowering to nir_intrinsic_read_invocation_cond_ir3
and adding lowering to movs.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32624>
 2025-06-26 10:22:09 +00:00
Job Noorman d94bea85b8 ir3: make backend aware of movs 
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32624>
 2025-06-26 10:22:09 +00:00
Job Noorman 4b3f58701c ir3/isa: add isaspec definition for movs 
movs works like subgroupBroadcast/OpGroupNonUniformBroadcast. The fiber
id can either be an immediate or a value in a0.x. In the latter case,
the value has to be dynamically uniform or else the behavior is
undefined. The dst register has to be shared or else the behavior seems
to be equivalent to a normal mov (i.e., the fiber id is not taken into
account anymore).

movs can do a cov on the broadcasted value. It works exactly like a
normal cov except that using u8 as the src type does not seem to work at
all.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32624>
 2025-06-26 10:22:09 +00:00
Job Noorman d328b1e8c0 ir3/parser: add uinteger helper 
To match unsigned immediates.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32624>
 2025-06-26 10:22:09 +00:00
Job Noorman f9b03fd170 ir3/a7xx: disable half shared mov quirk 
The HW issue was fixed in a7xx so we can remove the workarounds there.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32624>
 2025-06-26 10:22:09 +00:00
Job Noorman edce6f410f ir3: support half regs for read_{first,cond,getlast} 
The emitted mov had a hard coded dst type of u32. This was fine because
we needed this to work around a HW bug with shared half movs. However,
since this bug was fixed in a7xx, we need to support half movs as well.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32624>
 2025-06-26 10:22:08 +00:00
Job Noorman a02d7b0131 ir3: add helper to apply half shared mov quirk 
The quirk was copy-pasted in 3 separate places making it difficult to
make changes.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32624>
 2025-06-26 10:22:08 +00:00
Daniel Schürmann 7620957193 aco/ra: always set fill_operands=true when handling operands 
This makes the behavior consistent and less prone to error.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35735>
 2025-06-26 10:05:07 +00:00
Daniel Schürmann ee8424d839 aco/ra: always fill moved operands when handling vector-operands 
update_renames() assumes that killed operands are already removed from
the register file, except for precolored and copy-kill operands.
When dealing with vector-operands, however, unrelated operands might
also be moved, in order to make space.

Fixes: fb689f133e ('aco/ra: handle register assignment of vector-aligned operands')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35735>
 2025-06-26 10:05:07 +00:00
Georg Lehmann 7de352e99e nir,radv: add an option to not move 8/16bit vecs 
ACO will overestimate the register demand of the sources, so we don't
want to create the vector later.

Foz-DB Navi48:
Totals from 240 (0.30% of 80265) affected shaders:
MaxWaves: 6429 -> 6435 (+0.09%)
Instrs: 3406069 -> 3406646 (+0.02%); split: -0.01%, +0.03%
CodeSize: 18231596 -> 18233288 (+0.01%); split: -0.01%, +0.02%
VGPRs: 14768 -> 14732 (-0.24%)
Latency: 18981274 -> 18979170 (-0.01%); split: -0.02%, +0.01%
InvThroughput: 4247331 -> 4246634 (-0.02%); split: -0.02%, +0.01%
VClause: 85453 -> 85458 (+0.01%); split: -0.01%, +0.01%
Copies: 262046 -> 261971 (-0.03%); split: -0.06%, +0.03%
PreVGPRs: 10899 -> 10775 (-1.14%)
VALU: 1923441 -> 1923485 (+0.00%); split: -0.01%, +0.01%
SALU: 457983 -> 457982 (-0.00%)
VOPD: 4980 -> 4861 (-2.39%); split: +0.48%, -2.87%

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35729>
 2025-06-26 09:29:43 +00:00
Georg Lehmann 7ac9a87572 nir/opt_sink: don't assume moving conversion can't increase register pressure 
Foz-DB Navi48:
Totals from 11311 (14.09% of 80265) affected shaders:
MaxWaves: 337664 -> 337648 (-0.00%); split: +0.00%, -0.01%
Instrs: 10102221 -> 10101625 (-0.01%); split: -0.05%, +0.04%
CodeSize: 55000184 -> 54999292 (-0.00%); split: -0.04%, +0.03%
VGPRs: 571052 -> 571064 (+0.00%); split: -0.03%, +0.03%
Latency: 59247189 -> 59204726 (-0.07%); split: -0.13%, +0.06%
InvThroughput: 10236407 -> 10215675 (-0.20%); split: -0.26%, +0.06%
VClause: 211730 -> 211677 (-0.03%); split: -0.07%, +0.04%
SClause: 284802 -> 284762 (-0.01%); split: -0.07%, +0.06%
Copies: 702890 -> 702539 (-0.05%); split: -0.18%, +0.13%
Branches: 205117 -> 205112 (-0.00%)
PreSGPRs: 475898 -> 475825 (-0.02%); split: -0.02%, +0.00%
PreVGPRs: 366318 -> 366449 (+0.04%); split: -0.14%, +0.17%
VALU: 5764791 -> 5764349 (-0.01%); split: -0.02%, +0.01%
SALU: 1259529 -> 1259517 (-0.00%); split: -0.04%, +0.04%
VOPD: 5854 -> 5724 (-2.22%); split: +0.70%, -2.92%

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35729>
 2025-06-26 09:29:43 +00:00
David Rosca 0c8b245094 radeonsi/vpe: Change some error messages to warnings 
Error should be only used for critical failures.
Fixes warning spam when the input surface has DCC.

Reviewed-by: Peyton Lee <peytolee@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35719>
 2025-06-26 08:19:33 +00:00
Jose Maria Casanova Crespo 1377e18234 v3d: avoid submit of supertile coordinates on jobs without rasterization 
If all draw calls of a job were submitted with GL_RASTERIZER_DISCARD
enabled we can avoid all the rasterization by not submitting the
supertile coordinates in the CLE.

There is a performance improvement in scenarios where only running the
geometry stages is needed like using TF. Altought the load/stores were
already avoided. Before this patch, the FS was still being executed for
each tile.

It helps on manhattan benchmarks.

fps_avg  helped:  gl_manhattan.trace:   12.71 -> 13.16 (3.54%)
fps_avg  helped:  gl_manhattan31.trace:  7.86 ->  8.02 (2.03%)

total fps_avg in affected (through threshold) runs: 20.57 -> 21.18 (2.96%)

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35739>
 2025-06-26 07:27:11 +00:00
Jose Maria Casanova Crespo d0163f1096 v3d: Avoid fast TLB blit if reused job doesn't store the color buffer 
Fixes: 66de8b4b5c ("v3d: add a faster TLB blit path")
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35739>
 2025-06-26 07:27:11 +00:00
Pierre-Eric Pelloux-Prayer 04d283c628 radeonsi: transition to TC-compatible HTILE on full clears 
The new layout affects the whole buffer so it needs to be done
on a full clear.

This fixes this piglit test on a RX 6800 XT:
   ext_framebuffer_multisample-accuracy 6 depth_resolve small depthstencil

Fixes: 75a03d733a ("radeonsi: simplify and fix enable_tc_compatible_htile_next_clear logic")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35582>
 2025-06-26 07:06:51 +00:00
Pierre-Eric Pelloux-Prayer ac6abd9c23 radeonsi: enable SQTT for more chips 
Same as radv.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35582>
 2025-06-26 07:06:51 +00:00
Pierre-Eric Pelloux-Prayer ca0ed07588 ac/pm4: determine spi_shader_pgm_lo_reg when PKT3_SET_SH_REG_PAIRS is used 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35582>
 2025-06-26 07:06:51 +00:00
Pierre-Eric Pelloux-Prayer 5da4941101 radeonsi: fix typo in sdma code 
cs_create returns a bool not an int so check correctly for
success (sdma was still used because sdma_cs would be non
NULL when entering this function the second time).

While at it update debug_flags to not retry creating sdma_cs
if it failed.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35582>
 2025-06-26 07:06:51 +00:00
Pierre-Eric Pelloux-Prayer 6c206ffbbc radeonsi: use si_set_buf_desc_address helper 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35582>
 2025-06-26 07:06:51 +00:00
Konstantin Seurer 42c2ccbfb2 spirv: Move the shader_call_data workaround above nir_validate_shader 
Prevents validation failures.

Reviewed-by: Natalie Vock <natalie.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35532>
 2025-06-26 06:30:44 +00:00
Samuel Pitoiset 30ccd97cd2 radv: gather nir shader info at the end of radv_optimize_nir() 
Otherwise, outputs_read/outputs_written might not be up-to-date
(mostly after nir_remove_dead_variables) and remove_point_size() might
reach an assertion later because the output variable isn't found.

It seems better to run nir_shader_gather_info() at the very end of
radv_optimize_nir() which can change a lot of things anyways.

No fossils-db changes.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35707>
 2025-06-26 06:11:54 +00:00
Rob Clark 2e00925c81 freedreno/a6xx: Fix max_threads to account for reg footprint 
The register footprint could limit occupancy.  We need to take this into
account to avoid deadlocks when a kernel is using barriers.

Fixes: 6d85cd6a3b ("freedreno: Implement get_compute_state_info for Adreno 6xx/7xx")
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35745>
 2025-06-26 03:12:07 +00:00
Rob Clark 6f5ff6be44 nir: Fix lower_readonly_images_to_tex bitsize 
The txf instruction could be returning something smaller than 32b.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35758>
 2025-06-26 02:48:16 +00:00
Timothy Arceri 642c4cf2b2 dril: add BGR{X,A}8888 and RGB{X,A}8888 
Needed after a6f534107a15

Fixes: a6f534107a15 ("gbm/dri: Fix color format for big endian.")
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35726>
 2025-06-26 02:24:37 +00:00
Timothy Arceri b03cd283d5 dril: use endian independent pipe formats 
fourcc_to_pipe_format() was using the endian specific pipe
formats but drilConfigs which guards the supported formats
was using the little endian definitions directly so we would
always skip the formats on big endian. The little endian
pipe format is the correct one to use since that is how
DRM_FORMAT_* formats are defined.

Fixes: 20b340070149 ("dril: rework config creation")
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35726>
 2025-06-26 02:24:37 +00:00
Timothy Arceri e446c05a49 dril: fix format typo in lookup helper 
Fixes: 20b340070149 ("dril: rework config creation")
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35726>
 2025-06-26 02:24:37 +00:00
Caio Oliveira 30490de24a intel/executor: allow single line comments in macro lines 
Assembler supports them, so allow them on @-macro lines.  For now
we don't bother with multiline comments, if becomes a thing we
can add them later.

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35699>
 2025-06-26 00:58:02 +00:00
Caio Oliveira d14fa6683b intel/executor: update SFID names in macros to match recent changes 
After commit 88309a9818, SFID names were renamed

- "dp data 1" became "hdc1"
- "thread_spawner" became "ts/btd"

Update macros in executor to use the new SFID names so the
generated assembly can be parsed correctly.

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35701>
 2025-06-25 17:31:00 -07:00
Antonino Maniscalco 32a6b7ae09 freedreno/decode: expose lookback as a cli option 
It is sometimes necessary to exetend the lookback in order to catch
`CP_INDIRECT_BUFFER` packets.

Expose it as a command line option to facilitate that.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35752>
 2025-06-26 00:10:16 +00:00
Timothy Arceri eaad90c262 util/cpu: fix broken powerpc linux builds 
Fixes: 0ffbfa1d54 ("util/cpu: Teach the Linux code about getauxval()")
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35727>
 2025-06-25 23:39:23 +00:00
Eric Engestrom 2801c51a9e freedreno/drm: fix libvdrm inclusion logic 
Fixes: 0e3584df44 ("freedreno/drm/virtio: Switch to vdrm helper")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35723>
 2025-06-26 01:02:37 +02:00
Eric Engestrom 1a6fc7006a meson: split subdir for virtio/vdrm and virtio/vulkan 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35723>
 2025-06-25 22:21:48 +00:00
Eric Engestrom 6f8c4a7ce1 virtio: move inc_virtio up one folder 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35723>
 2025-06-25 22:21:48 +00:00
Eric Engestrom a1daeb87a8 meson: fix vdrm inclusion logic 
This is about which driver use vdrm, not which OS we're on.

Fixes the build on non-KMS/DRM system.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12899
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35723>
 2025-06-25 22:21:48 +00:00
Eric Engestrom d0c7bea727 meson: allow "venus without virgl" builds 
`cc: mesa-stable` instead of `fixes:` because several commits have
modified this but keeping this bug:
- 06e57e3231 ("virtio: Add vdrm native-context helper") made
  an unconditional copy of subdir(virtio)
- cede4e7ac3 ("meson: Only include virtio when DRM available")
  introduced a new condition, which doesn't cover everything that was
  needed
- other commits made more changes

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35723>
 2025-06-25 22:21:47 +00:00
Eric Engestrom b4ed35994d meson: bump required meson version to 1.4 
See https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35652#note_2973761

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35742>
 2025-06-25 21:55:16 +00:00
Eric Engestrom 474774ea58 meson: drop error for meson < 1.3 since we require 1.3+ already 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35742>
 2025-06-25 21:55:16 +00:00
Eric Engestrom cd9879d632 docs: drop outdated line about meson version 
Clearly we don't keep this line updated, so let's just drop it to not
state incorrect information.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35742>
 2025-06-25 21:55:15 +00:00
Mohamed Ahmed ab6c55893b nil/copy.rs: Add host copy support for Fermi-Volta 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35756>
 2025-06-25 21:32:38 +00:00
Faith Ekstrand 3c5b4fdc82 nil: Rename a few GOB types 
This adds a single catch-all depth/stencil GOB type instead of Turing
having its own and renames the Fermi GOB type FermiColor because we
don't want to pretend depth/stencil and color are the same anywhere at
the moment.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35756>
 2025-06-25 21:32:38 +00:00
Faith Ekstrand c83493cfb2 nil: Fix the GOBType::TuringColor2D description 
The sectors were in the wrong order.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35756>
 2025-06-25 21:32:37 +00:00
Antonino Maniscalco 8ea0b00a75 zink: wait for sparse queue to go idle 
When destroying the context we should also wait for the sparse queue to
go idle.

cc: mesa-stable

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35750>
 2025-06-25 18:24:35 +00:00
Samuel Pitoiset e91029c82d aco: consider that nir_tex_src_{coord,ddx} can be the first source 
Only -1 means it's not found, but 0 is still valid.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35736>
 2025-06-25 17:20:02 +00:00
Eric R. Smith fddd455e9c pan: Teach libpanfrost about YU08/Y010 
This is just a matter of adding a few entries to existing
arrays/switch-statements, the rest of the logic stays
unchanged.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35318>
 2025-06-25 18:40:32 +02:00
Eric R. Smith f2093b137e dri2: Teach the DRI layer about YU08 and YU10 
Add the necessary bits to support YU08/YU10 images.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35318>
 2025-06-25 18:38:40 +02:00
Eric R. Smith 8c68512b84 gallium/st: Teach the state tracker about YU08 and YU10 formats 
Add the necessary bits to the state tracker to support single plane
YUV 420 formats (YU08 and YU10 fourcc codes).

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35318>
 2025-06-25 18:38:37 +02:00