Commit Graph

9468 Commits

Author SHA1 Message Date
Dave Airlie cc50edbca2 r300: fix bug with maniadrive rendering
I've no idea why I added this so I'll have to spend time tracking it down
2008-01-02 01:19:23 +10:00
Zou Nan hai d0ebdca4fa fix fd.o bug #13847 2007-12-29 15:28:51 +08:00
Roland Scheidegger 3956597962 Bug #13839: Fix 3D texture offset miscalculation with pixels versus bytes. 2007-12-28 18:05:22 -08:00
Xiang, Haihao aac2d99dc3 i915: reset swrast state after calling swrast DrawPixels.
In order to optimize DrawPixels, the i915 texenv program isn't
applied to swrast DrawPixels in the i915 driver. This causes this
program isn't applied to any following swrast functions. Resetting
the swrast state fixes this issue.  Fix #13614
2007-12-27 10:43:43 +08:00
Xiang, Haihao b422e5ad37 i915: apply commit a0a5e8cfc0 from 965.
fix #11925
2007-12-25 17:22:19 +08:00
Xiang, Haihao cf46aee14a mesa: fix a bad cast in put_values_z24.
The values passed to put_values_z24 are GLuint,
not GLubyte. fix #13543
2007-12-25 14:18:05 +08:00
Adam Jackson 166a828ddf __driConfigOptions must be PUBLIC. 2007-12-24 19:16:24 -05:00
Alex Deucher 0b7e0f8159 R300: RV410 SE chips have half the pipes of regular RV410
This fixes 3D rendering on x700 SE chips.  Reported
by Kano.
2007-12-24 11:59:27 -05:00
Roland Scheidegger 26473140b9 fix GL_LINE_LOOP with drivers using own render pipeline stage (#12410, #13527)
primitive needs to include the begin/end flags (broken since vbo-0.2). Should
fix missing first/last line segment on gamma, i810, i915, mga, r200, radeon,
s3v, savage, unichrome (r300 already correct). Tested on r200, fixes #13527.
2007-12-22 18:54:18 +01:00
Kristian Høgsberg 2f3e939ae7 Silence compiler warnings from XML error macros. 2007-12-21 15:31:00 -05:00
Eric Anholt 9136e1f2c8 [965] Fix and enable separate stencil.
Note that this does not enable GL_EXT_stencil_two_side, because Mesa's computed
_TestTwoSide ends up respecting only STENCIL_TEST_TWO_SIDE_EXT (defaults to
GL_FALSE), even if the application uses only GL 2.0 / ATI entrypoints.
2007-12-21 11:50:00 -08:00
Eric Anholt 9e68e191ac [intel] Move some pixel path support from drivers to shared. 2007-12-21 11:41:46 -08:00
Xiang, Haihao f8830a1bf7 intel: cast a pointer to unsigned long, avoid potential error. 2007-12-21 17:03:55 +08:00
Eric Anholt bea6b5fe5a [965] Enable EXT_framebuffer_object.
To do so, merge the remainnig necessary code from the buffers, blit, span, and
screen code to shared, and replace it with those.
2007-12-20 11:32:55 -08:00
Eric Anholt 106f398220 [965] Actually enable SGIS_generate_mipmap. 2007-12-20 11:28:10 -08:00
Eric Anholt 101abee6c4 [intel] Fix and reenable (software) SGIS_generate_mipmap
The core problem was that _mesa_generate_mipmap was not respecting RowStride
of the source image.  Additionally, the intel private data associated with the
images (level and face) was not being initialized for the
_mesa_generate_mipmap-generated images.
2007-12-20 11:26:34 -08:00
Eric Anholt b2f62609d0 [intel] Allow driver hooks to be NULL in intel_buffers.c and just update flags.
The 965 driver relies on flag checking instead of these hooks, and will be
using this code soon.
2007-12-20 08:24:45 -08:00
Eric Anholt fcd1e9dad6 [i915] Move meta_draw_quad into the vtbl with other meta operations. 2007-12-20 08:19:42 -08:00
Brian 2761cfce46 return correct size from glGetActiveUniform (bug 13751) 2007-12-20 09:06:05 -07:00
Xiang, Haihao e543292335 i915: avoid dead lock in intel_meta_draw_poly. fix #13696 2007-12-20 16:49:25 +08:00
Eric Anholt d2d82f8a29 [915] Set cliprects in the drawbuffer software fallback case as well.
Otherwise, we may violate cliprect asssertions on clearing the buffers, which
isn't affected by the fallback.
2007-12-18 18:56:20 -08:00
Xiang, Haihao 4cca760a9b i965: allocate GRF registers before building subroutines,
it ensures there are sufficient registers for all subroutines.
2007-12-19 10:22:28 +08:00
Xiang, Haihao e3a1ae0fcb i965: restore the flag after building the subroutine of the
GS thread. fix #13240
2007-12-19 09:59:37 +08:00
Brian 256115bd5e simplify update two-side lighting test (follow-on to previous front/back-face changes) 2007-12-18 16:24:19 -07:00
Brian 441bab8f17 fix NEED_SECONDARY_COLOR for vert/frag progs 2007-12-18 16:24:19 -07:00
Eric Anholt 9efa1029e5 Fix mismatched map/unmap of buffers in swrast read/drawpixels error paths. 2007-12-18 14:51:42 -08:00
Eric Anholt 4878f12189 [915] Free dri_bufmgr after mesa context data.
Fixes a crash when buffer objects are left around until context destroy.
2007-12-18 14:17:27 -08:00
Eric Anholt a856da6324 [915] Make polygon stipple use pre-unpacked pixel data.
This fixes a crash when stippling using data from a PBO.
2007-12-18 14:14:44 -08:00
Eric Anholt 0dc2c68ffc [915] Fix clear color when clearing with triangles.
The diffuse color format is always ARGB32, regardless of the destination
surface format.
2007-12-18 10:42:30 -08:00
Keith Packard dd1a868b74 [INTEL] Fix 965 to use new centralized mipmap pitch function 2007-12-18 10:22:16 -08:00
Keith Packard a183efc132 [Intel] Centralize mipmap pitch computations.
mipmap pitches must account for the device alignment requirements, which
used to be fairly simple; just align to a 4-byte boundary. However, to allow
textures to be drawn to under TTM, they now need to be aligned to a 64-byte
boundary. Placing all of the alignment constraints in a single function
allows this new constraint to be applied uniformly.

There was some pitch constraining code in intel_miptree_create, but that was
modifying the pitch long after the miptree had been layed out, so it only
served to wreck the mipmap and cause rendering errors.
2007-12-18 10:22:04 -08:00
Eric Anholt 6f1bfdc4bf [i915] Remove redundant set_draw_region code (like the comment says). 2007-12-17 17:01:07 -08:00
Eric Anholt 33487c15ba [intel] Improve INTEL_DEBUG=blit description of clearing. 2007-12-17 16:57:59 -08:00
Eric Anholt c24300f937 [intel] Fix copy'n'pasteo in decoding of the blit clear packet. 2007-12-17 16:53:51 -08:00
Eric Anholt 9a8819e767 [965] Add decode of 3DSTATE_DRAWING_RECTANGLE. 2007-12-17 16:53:47 -08:00
Eric Anholt 146030aad2 [965] Allow draw or depth regions to be NULL.
With FBOs, we end up wanting to do 3D metaops against one or the other without
having to find the other one to fill in if we're not going to draw to it.
2007-12-17 16:50:09 -08:00
Eric Anholt 447facfcd6 [965] Simplify scissor handling by using DrawBuffer values. 2007-12-17 15:30:04 -08:00
Eric Anholt 8336f3ffb7 [965] fix bad conflict resolution in debug code. 2007-12-17 14:42:31 -08:00
Eric Anholt 2c9e515d86 [965] Replace our own depth constants in intel context with GL context ones. 2007-12-17 14:28:54 -08:00
Eric Anholt 98d4355240 [965] Fix software fallbacks with region-backed textures. 2007-12-17 13:47:52 -08:00
Eric Anholt c1d6b874b3 [intel] Cleanup of */intel_blit.c to bring the two closer. 2007-12-17 13:19:33 -08:00
Eric Anholt b3169a9c35 [965] Output the buffer type in INTEL_DEBUG=bat surface state decode. 2007-12-17 13:02:16 -08:00
Michel Dänzer 1e04132306 i915: Fix issues with glDrawBuffer(GL_NONE).
Don't dereference NULL renderbuffer pointer, and make sure the software
fallback sticks.

Fixes https://bugs.freedesktop.org/show_bug.cgi?id=13694 .
2007-12-17 12:20:56 +01:00
Xiang, Haihao d859a60dc3 i965: check NULL pointer 2007-12-17 14:42:42 +08:00
Eric Anholt d913a15898 [i915] Fix missing symbol from 965 changes. 2007-12-16 13:00:23 -08:00
Eric Anholt 1daf5b3ad6 [965] Fully initialize the texture surface key data (padding around GLboolean) 2007-12-16 12:09:22 -08:00
Eric Anholt cbed2e4add [965] Enable ARB_pixel_buffer_object, and disable broken imaging extension.
While I haven't tested the imaging extension, this matches what 915 does.
2007-12-16 11:46:10 -08:00
Eric Anholt c0b4257aa9 [965] Move to using shared texture management code.
This removes the delayed texture upload optimization from 965, in exchange for
bringing us closer to PBO support.  It also disables SGIS_generate_mipmap,
which didn't seem to be working before anyway, according to the lodbias demo.
2007-12-16 11:26:19 -08:00
Eric Anholt 659baa3f25 [intel] Whitespace and comment changes to bring intel_mipmap_tree.c closer. 2007-12-15 13:09:58 -08:00
Eric Anholt 3fe9d5cbb7 [intel] Merge intel_buffer_objects to shared.
965 gains fixed TTM typing of the buffer object buffers and unused PBO
functions, and 915 gains buffer size == 0 fixes from 965.
2007-12-15 12:47:23 -08:00