caae9b0e1f
d3d12: Always respect offsets when mapping a bo, not just when there's a range
...
Reviewed-by: Sil Vilerino <sivileri@microsoft.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14933 >
2022-02-08 20:36:29 +00:00
b48aea0ec8
d3d12: Fix range calculation for suballocated buffers in d3d12_bo_unmap
...
Reviewed-by: Sil Vilerino <sivileri@microsoft.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14933 >
2022-02-08 20:36:29 +00:00
2659098d6d
d3d12: Fix set constant buffers
...
Reviewed-by: Sil Vilerino <sivileri@microsoft.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14933 >
2022-02-08 20:36:29 +00:00
7ec0e2b893
tc: CPU storage needs to be freed with align_free
...
Cc: mesa-stable
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Reviewed-by: Sil Vilerino <sivileri@microsoft.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14933 >
2022-02-08 20:36:29 +00:00
12446491c1
panfrost: Fix Depth Source enum
...
As I suspected... sigh.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14935 >
2022-02-08 20:27:09 +00:00
32e58c2dd4
panfrost: Remove unused layout enums
...
Folded into Valhall-specific plane descriptor enums.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14935 >
2022-02-08 20:27:09 +00:00
d27d46a266
panfrost: Remove some indexed formats on Valhall
...
Block compressed formats like ETC2 are now indicated in the plane descriptor,
rather than the pixel format descriptor. Various other minor formats were
removed in Valhall; remove them from the XML so we don't accidentally try to use
them.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14935 >
2022-02-08 20:27:09 +00:00
8c51b54bd1
panfrost: Update supported job types
...
Remove a few that no longer exist, and rename IDVS helper to Malloc Vertex. The
distinction between Malloc Vertex jobs and regular Indexed Vertex jobs is that
the hardware allocates varying buffers dynamically for Malloc Vertex jobs.
Regular IDVS and even legacy tiler jobs are also supported where desired.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14935 >
2022-02-08 20:27:09 +00:00
d70a48a706
panfrost: Flesh out tiler heap descriptor
...
Merged with the Buffer descriptor, hence why it shares a type nibble. However,
Bifrost uses a dedicated tiler heap descriptor, and I see no benefit to merging.
So pretending it's a dedicated descriptor on Valhall too allows us to reuse the
Bifrost code with no modifications.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14935 >
2022-02-08 20:27:09 +00:00
62173fa532
panfrost: Strip % in GenXML names
...
A new Valhall enum will represent percentages, so allow that.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14935 >
2022-02-08 20:27:09 +00:00
e514f4c0b1
panfrost: Flesh out Buffer descriptor
...
Add fields required for structured buffers.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14935 >
2022-02-08 20:27:09 +00:00
4c61c8a0b8
vulkan,lavapipe: Simplify command recording code-gen
...
The Entrypoint class already has utilities for gettingt he parameter
list as either declarations or as comma-separated argument names for a
call. Use that instead of hand-rolling it. The only modification we
need to make is to add the ability to start the list somewhere other
than at the beginning.
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14919 >
2022-02-08 19:50:57 +00:00
cb781fc350
lavapipe: ci updates
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14911 >
2022-02-08 18:38:20 +00:00
1532556eb0
zink: ci updates
...
Reviewed-by: Dave Airlie <airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14911 >
2022-02-08 18:38:20 +00:00
08c2b9d7cb
lavapipe: use util_pack_color_union() for generating clear colors
...
this enables clamping for packed formats (e.g., RGB10_A2UI) where color
values may exceed the width of the component
cc: mesa-stable
fixes (zink):
KHR-GL45.direct_state_access.renderbuffers_storage*
Reviewed-by: Dave Airlie <airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14911 >
2022-02-08 18:38:20 +00:00
6faaeca584
ci/freedreno: Add another unsizedArrayLength flake.
...
Started appearing on Feb 1, but given that the rest of this test group
flakes, I assume it's similar.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14934 >
2022-02-08 18:04:37 +00:00
cf4de7d8ff
venus: Allow usage of virtio-mmio based device
...
Libdrm reports bustype as DRM_BUS_PLATFORM for virtio-mmio
based device. DRM_BUS_PCI is reported only for virtio-pci based
devices. Add possibility to use devices with DRM_BUS_PLATFORM.
Signed-off-by: Andrii Pauk <Andrii.Pauk@opensynergy.com >
Reviewed-by: Chia-I Wu <olvaffe@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14531 >
2022-02-08 17:53:21 +00:00
5e9df85b1a
aco: optimize discard_if when WQM is not needed afterwards
...
Totals from 11560 (8.57% of 134913) affected shaders: (GFX10.3)
CodeSize: 12092560 -> 11997652 (-0.78%)
Instrs: 2205325 -> 2181598 (-1.08%)
Latency: 15376048 -> 15356958 (-0.12%); split: -0.12%, +0.00%
InvThroughput: 3526105 -> 3525120 (-0.03%); split: -0.03%, +0.00%
Copies: 98543 -> 87601 (-11.10%)
Branches: 16919 -> 16873 (-0.27%)
PreSGPRs: 291584 -> 291532 (-0.02%)
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14805 >
2022-02-08 16:16:07 +00:00
13c3137960
aco: merge block_kind_uses_[demote|discard_if]
...
These serve the same purpose. The new name is
block_kind_uses_discard.
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14805 >
2022-02-08 16:16:07 +00:00
e7d1c8cc5e
aco: make Preserve_WQM independent from block_kind_uses_discard_if
...
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14805 >
2022-02-08 16:16:07 +00:00
08b8500dfb
aco: remove block_kind_discard
...
This case doesn't seem to happen in practice.
No need to micro-optimize it.
This patch merges instruction selection for discard/discard_if.
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14805 >
2022-02-08 16:16:07 +00:00
b67092e685
aco: emit nir_intrinsic_discard() as p_discard_if()
...
This simplifies the code and emits a slightly better
sequence in some cases.
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14805 >
2022-02-08 16:16:07 +00:00
1895e17591
mesa: align constant/uniform uploads to driver expected alignment
...
This fixed a problem for Zink where uniform buffer alignment varies by
GPU, e.g. 64 bytes for an RTX 2070 SUPER but 256 bytes for a GTX 1070
Ti.
Tested running Superposition on Windows 10 with Nvidia 1070 Ti with
496.13 driver. Without the fix Superposition soft locks on its splash
screen. With the fix Superposition runs through its benchmark.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14674 >
2022-02-08 15:08:21 +00:00
418c77640b
zink: Fix MSVC RTC in zink_get_framebuffer_imageless()
...
The bit fields in zink_framebuffer_state cause a false positive with
MSVC's run-time checks enabled. setting state.num_attachments in
zink_get_framebuffer_imageless(). Writing some bits of num_attachments
involves reading bits from layers and samples that haven't been
initialized.
Fixed by assigning to num_attachments earlier in the function. Not
quite sure why that makes a difference but at a guess there's a
heuristic that considers assignment close to declaration as
initialization.
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14566 >
2022-02-08 14:43:00 +00:00
86cb664cd8
zink: export PIPE_CAP_CULL_DISTANCE_NOCOMBINE
...
fixes:
KHR-GL46.cull_distance.functional
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14878 >
2022-02-08 14:03:09 +00:00
7e9481eaac
gallium: add PIPE_CAP_CULL_DISTANCE_NOCOMBINE
...
for drivers where separate cull distance variables are required, this
lets them avoid having to write yet another pass to undo gallium's mangling
of shader info
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14878 >
2022-02-08 14:03:09 +00:00
93a90fc85d
anv: fix conditional render for vkCmdDrawIndirectByteCountEXT
...
We just forgot about conditional render for this entry point.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Fixes: 2be89cbd82michael.blumenkrantz@gmail.com >
Reviewed-by: Tapani Pälli <tapani.palli@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14891 >
2022-02-08 13:33:38 +00:00
5d3e419378
anv: enable ray queries
...
Only on platforms that support it.
v3: Split out code setting up ray query shadow buffer (Caio)
Don't forget to setup ray query globals even when no shadow buffer
is used (Lionel)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719 >
2022-02-08 12:55:25 +00:00
c78be5da30
intel/fs: lower ray query intrinsics
...
v2: Add helper for acceleration->root_node computation (Caio)
v3: Update comment on "done" bit (Caio)
Remove progress bool value for impl function (Caio)
Don't use nir_shader_instructions_pass to search the shader (Caio)
v4: Rename variable for if/else block (Caio)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719 >
2022-02-08 12:55:25 +00:00
712d8fb043
intel/nir: document RT builder
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719 >
2022-02-08 12:55:25 +00:00
e06f9d49bc
nir/lower_shader_calls: consider relocated constants as rematerializable
...
After all they're constants.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719 >
2022-02-08 12:55:25 +00:00
0465714790
intel/nir/rt: add more helpers for ray queries
...
v2: Split stack_id helper in sync/async version (Caio)
Fixup a few bit field mistake (Caio)
Simplify some bitfield manipulations (Caio)
v3: Remove duplicated helper (Caio)
Simplify brw_nir_rt_set_dword_bit_at (Caio)
Comment brw_nir_rt_query_mark_init (Lionel)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719 >
2022-02-08 12:55:25 +00:00
d5b994ec8a
intel/nir/rt: make RT manipulation helpers helper invocations ready
...
Since we need to be able to perform ray queries in helper invocations,
we need to have all the helpers properly tag their load/store
operations so that they operate in helper lanes.
v2: Switch from macros to inline functions (Caio)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719 >
2022-02-08 12:55:25 +00:00
fb69fed65b
intel/nir: document committed argument
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719 >
2022-02-08 12:55:25 +00:00
b0624e414f
intel/fs: make trivial shader complete tracing operations with missing shaders
...
v2: Apply workaround only on < DG2-512-C0 & < DG2-128-B0
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719 >
2022-02-08 12:55:25 +00:00
35bd19f53d
intel/nir/rt: load bvh_level value off mem_hit structure
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719 >
2022-02-08 12:55:25 +00:00
6d9ae6ec1e
intel: add a new intrinsic to get the shader stage from bindless shaders
...
We'll use this to apply ray tracing operations in our trivial return
shader based on the stage we're in.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719 >
2022-02-08 12:55:25 +00:00
b8f087b0e6
nir/builder: add nir_ior_imm() helper
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719 >
2022-02-08 12:55:25 +00:00
bb40e999d1
intel/nir: use a single intel intrinsic to deal with ray traversal
...
In the future we'll want to reuse this intrinsic to deal with ray
queries. Ray queries will use a different global pointer and
programmatically change the control/level arguments of the trace send
instruction.
v2: Comment on barrier after sync trace instruction (Caio)
Generalize lsc helper (Caio)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719 >
2022-02-08 12:55:25 +00:00
39f6cd5d79
intel/nir: fix shader call lowering
...
We're replacing a generic instruction by an intel specific one, we
need to remove the previous instruction.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Fixes: c5a42e4010caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719 >
2022-02-08 12:55:25 +00:00
2665595244
intel/fs: limit FS dispatch to SIMD16 when using ray queries
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719 >
2022-02-08 12:55:25 +00:00
57eed6698b
intel/compiler: tracker number of ray queries in prog_data
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719 >
2022-02-08 12:55:25 +00:00
9b366243ed
intel/fs: load more fields from BVH instance leafs
...
v2: Fixup mask (Caio)
Drop old comment (Caio)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719 >
2022-02-08 12:55:24 +00:00
c89024e446
intel/fs: don't set allow_sample_mask for CS intrinsics
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Fixes: 77486db867caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719 >
2022-02-08 12:55:24 +00:00
9d22f8ed23
intel/fs: add support for ACCESS_ENABLE_HELPER
...
v2: Factor out fragment shader masking on send messages (Caio)
Update comments (Caio)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719 >
2022-02-08 12:55:24 +00:00
c199f44d17
intel/fs: name sources for A64 opcodes
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719 >
2022-02-08 12:55:24 +00:00
23ce94ff7e
intel/nir/rt: add a new number of SIMD lanes per DSS helper
...
v2: Add prefix brw_nir_rt (Caio)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719 >
2022-02-08 12:55:24 +00:00
61c9b7a82e
intel/fs: add support for Eu/Thread/Lane id
...
This index will be used for accessing ray query data in memory.
v2: Drop a MOV (Caio)
v3: Rework back code emission (Caio)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719 >
2022-02-08 12:55:24 +00:00
3dabe93257
intel/fs: rework dss_id opcode into generic opcode
...
We'll want different types of IDs based on topology. Let's make this
more flexible and also move the bit shifting code a layer above where
it's easier to do bitshifting operations, especially if you need to
stash things into temporary registers.
v2: Keep previous comment.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719 >
2022-02-08 12:55:24 +00:00
4deb8e86df
nir: change intel dss_id intrinsic to topology_id
...
This will allow to reuse the same intrinsic for various topology based
ID.
v2: fix intrinsic comment (Caio)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719 >
2022-02-08 12:55:24 +00:00
Jesse Natalie