AlexIndustrial/mesa
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
122,494 Commits 1 Branch 0 Tags
c19ebca308f30d09949ca66cc10ea63592fe98cf
Commit Graph

122494 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Timothy Arceri c19ebca308 nir: add matrix_layout to nir_variable data 
This will be used by the following patch.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4623>
 2020-04-18 11:50:44 +00:00
Lionel Landwerlin f27c707585 anv: skip writing perfcntr in results on Gen12+ 
We were not capturing the register already so don't bother writing the
delta in the results (we were previously doing a delta between two 0
values).

v2: Fix unused function warning

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4586>
 2020-04-18 13:32:27 +03:00
Lionel Landwerlin 086ea1ac7e intel/perf: Enable MDAPI queries for Gen12 
We're missing the cases for gen12 leading to those metrics going
missing.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 15b7b56eb2 ("intel/perf: add TGL support")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4586>
 2020-04-18 02:04:09 +03:00
Alyssa Rosenzweig 29fb5451a9 pan/bit: Add fp16 min/max tests 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig 532dfebc71 pan/bit: Add constants test 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig 15fe8d5d7b pan/bit: Add fexp2_fast test 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig 20f255b18e pan/bit: Add fexp2_fast interp 
Kind of a hack and not at all how the h/w does it.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig 8890fa4050 pan/bit: Add FMA_MSCALE test 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig b7dd5b579d pan/bit: _MSCALE interp 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig 1e3960a725 pan/bit: Add BI_TABLE test 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig 93fffd8a11 pan/bit: Add log2 helper interp 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig 1c45b58ceb pan/bit: Add FMA_REDUCE test 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig 5546d1958b pan/bit: Add BI_REDUCE_FMA interp 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig 68b4e708f1 pan/bit: Add frexp_log test 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig 36cfe722e5 pan/bit: Add FREXP interp support 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig c05860789a pan/bi: Lower special ops to 32-bit 
We don't have 16-bit tables. We could probably do a bit better to avoid
so many conversions but hey.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig 4d0f941036 pan/bi: Round constants to 32-bit 
We can only access lo/hi at 32-bit intervals.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig d30df466b5 pan/bi: Dump extra bits for disasm 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig 590d66fa0c pan/bi: Pack MAX.v2f16 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig f87403c4c1 pan/bi: Pack ADD.v2f16 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig 7e76c2b806 pan/bi: Structify add and min/max fp16 ADD 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig 1647884cec pan/bi: Workaround constant packing errata 
Incomplete fix.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig d772bf0101 pan/bi: Try to reuse constants in ALU 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig aba7f09902 pan/bi: Handle st_vary with <4 components 
Still no writemasks.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig 438e445e17 pan/bi: Fix vec2/3 handling 
Otherwise we get moves from null.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig 031ad0ecc2 pan/bi: Implement flog2 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig 8e52206dbe pan/bi: Add fexp2 implementation 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig b1d4d8f743 pan/bi: Fix lower_combine swizzle rewrite 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig 60f252708f pan/bi: Fix packing with low-nibble-set on hi constant 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig 10fb5fb460 pan/bi: Fix packing with multiple constants 
Need to use bottom nibble of the 64, not the half.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig 86c2a6b9fe pan/bi: Fix bi_get_immediate with multiple imms 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig df69304ac8 pan/bi: Ensure CONSTANT srcs have types 
So the next commit is valid.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig 8f70f4432c pan/bi: Split src/dest index printing 
So we can handle constant printing correctly.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig db5c1ae8fd pan/bi: Add fexp2_fast packing 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig c3eebfeb11 pan/bi: Pack FMA_MSCALE 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig 0cb703984e pan/bi: Structify FMA_MSCALE 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig 4570c34fc7 pan/bi: Add _MSCALE flag for FMA/ADD 
So we can bias by exponents.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig d3643cdd81 pan/bi: Add log2_help packing 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig 6039d51e32 pan/bi: Pack ADD_FREXPM 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig ffa9f6a789 pan/bi: Add bi_pack_fma_2src helper 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig 9904ed170a pan/bi: Add frexp_log packing 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig e067fd7b00 pan/bi: Add log_frexpe op to IR 
As part of BI_FREXP

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:34 -04:00
Alyssa Rosenzweig 40befaa965 pan/bi: Add FLOG2_U op to disassembler 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:34 -04:00
Alyssa Rosenzweig 62c8c3445e pan/bi: Add op for ADD_FREXPM 
Used in log2. Needs a new class as well due to scheduling silliness.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:34 -04:00
Alyssa Rosenzweig cc61156626 pan/bi: Add special op for exp2 
Needs some extra help but basically exp2_fast

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:34 -04:00
Alyssa Rosenzweig af01378dce pan/bi: Add BI_TABLE for fast table accesses 
Used to implement SPECIAL ops. Separate class since they are faster
which means you can pair them with actual work on FMA.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:34 -04:00
Alyssa Rosenzweig 83d961b0c2 pan/bi: Disable FMA scheduling for CONVERT 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:34 -04:00
Alyssa Rosenzweig 86c0ea383d pan/bi: Add disasm for ADD.i8 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:34 -04:00
Jason Ekstrand f5deed138a spirv,nir: Move the SPIR-V vector insert code to NIR 
This also makes spirv_to_nir a bit simpler because the new
nir_vector_insert helper automatically handles a constant component
selector like nir_vector_extract does.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4495>
 2020-04-17 19:21:44 +00:00
Jason Ekstrand feca439697 spirv: Call nir_builder directly for vector_extract 
The nir_builder helper already handles checking if the component
selector is an immediate and returns an undef in the OOB case.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4495>
 2020-04-17 19:21:44 +00:00